Semiconductor & Computer Engineering
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Difference between revisions of "intel/pentium (2009)/4405u"
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== Cache == | == Cache == | ||
{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}} | {{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}} | ||
| − | {{cache | + | {{cache size |
| + | |l1 cache=128 KiB | ||
|l1i cache=64 KiB | |l1i cache=64 KiB | ||
|l1i break=2x32 KiB | |l1i break=2x32 KiB | ||
|l1i desc=8-way set associative | |l1i desc=8-way set associative | ||
| − | |||
|l1d cache=64 KiB | |l1d cache=64 KiB | ||
|l1d break=2x32 KiB | |l1d break=2x32 KiB | ||
|l1d desc=8-way set associative | |l1d desc=8-way set associative | ||
| − | |l1d | + | |l1d policy=write-back |
|l2 cache=512 KiB | |l2 cache=512 KiB | ||
|l2 break=2x256 KiB | |l2 break=2x256 KiB | ||
|l2 desc=4-way set associative | |l2 desc=4-way set associative | ||
| − | |l2 | + | |l2 policy=write-back |
|l3 cache=2 MiB | |l3 cache=2 MiB | ||
|l3 break=2x1 MiB | |l3 break=2x1 MiB | ||
| + | |l3 policy=write-back | ||
}} | }} | ||
Revision as of 02:32, 15 May 2017
Template:mpu Pentium 4405U is a dual-core budget 64-bit x86 microprocessor introduced by Intel in late 2015. This processor, which is based on the Skylake microarchitecture, is fabricated on Intel's 14 nm process and operates at 2.1 GHz with a TDP of 15 W and a configurable TDP-down of 10 W. The 4405U incorporates the HD Graphics 510 IGP operating at up to 950 MHz and supports up to 32 GiB of dual-channel DDR4-2133 memory.
Cache
- Main article: Skylake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Graphics
| Integrated Graphic Information | |
| GPU | Intel HD Graphics 510 |
| Device ID | 0x1906 |
| Execution Units | 12 |
| Displays | 3 |
| Frequency | 300 MHz 0.3 GHz
300,000 KHz |
| Max frequency | 950 MHz 0.95 GHz
950,000 KHz |
| Max memory | 64 GB "GB" is not declared as a valid unit of measurement for this property.
|
| Output | DisplayPort, Embedded DisplayPort, HDMI, DVI |
| DirectX | 12.1 |
| OpenGL | 4.4 |
| OpenCL | 2.0 |
| HDMI | 1.4 |
| DP | 1.2 |
| eDP | 1.3 |
| Max HDMI Res | 4096x2304 @24 Hz |
| Max DP Res | 4096x2304 @60 Hz |
| Max eDP Res | 4096x2304 @60 Hz |
| Intel Quick Sync Video | |
| Intel WiDi (Wireless Display) | |
| Intel Clear Video | |
Memory controller
| Integrated Memory Controller | |
| Type | DDR3L-1333, DDR3L-1600, DDR3L-RS1333, DDR3L-RS1600, DDR4-1866, DDR4-2133, DDR4-RS1866, DDR4-RS2133 |
| Controllers | 1 |
| Channels | 2 |
| ECC Support | No |
| Max bandwidth | 34.1 GB/s |
| Max memory | 32 GB |
Expansions
Features
Facts about "Pentium 4405U - Intel"
| device id | 0x1906 + |
| has feature | integrated gpu + |
| integrated gpu | Intel HD Graphics 510 + |
| integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
| integrated gpu max frequency | 950 MHz (0.95 GHz, 950,000 KHz) + |
| l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
| l3$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |