Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "intel/cores/kaby lake dt"
(Created page with "{{intel title|Kaby Lake DT|core}} {{core | name = Kaby Lake DT | image = kaby lake dt (front).png | image size = 250px | image 2 = ka...") |
(No difference)
|
Revision as of 00:18, 29 March 2017
| Edit Values | |
| Kaby Lake DT | |
.png) | |
.png) | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | March 28, 2017 (announced) March 28, 2017 (launched) |
| Microarchitecture | |
| ISA | x86-64 |
| Microarchitecture | Kaby Lake |
| Word Size | 8 octets 64 bit16 nibbles |
| Process | 14 nm 0.014 μm 1.4e-5 mm |
| Technology | CMOS |
| Clock | 3,000 MHz - 3,900 MHz |
| Succession | |
Kaby Lake DT (KBL-DT) is the name of the core for Intel's entry-level servers and workstations line of processors based on the Kaby Lake microarchitecture serving as a successor to Skylake DT core. These chips are primarily targeted towards professional-grade workstation and entry-level servers. Kaby Lake DT processors are fabricated on Intel's enhanced 14nm+ process and provide slight enhancements over comparable Skylake models.
Facts about "Kaby Lake DT - Cores - Intel"
| designer | Intel + |
| first announced | March 28, 2017 + |
| first launched | March 28, 2017 + |
| instance of | core + |
| isa | x86-64 + |
| main image | + and + |
| manufacturer | Intel + |
| microarchitecture | Kaby Lake + |
| name | Kaby Lake DT + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |
.png){kind=link}
.png){kind=link}