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Difference between revisions of "loongson/godson 2/2b"
< loongson‎ | godson 2

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| series              = Godson 2
 
| series              = Godson 2
 
| locked              =  
 
| locked              =  
| frequency          = 250 MHz
+
| frequency          = 300 MHz
 
| frequency 2        =  
 
| frequency 2        =  
 
| frequency N        =  
 
| frequency N        =  

Revision as of 20:19, 19 March 2017

Template:mpu Godson-2B (龙芯2B) is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. Introduced in late 2003, the Godson-2B operates at up to 250 MHz consuming up to 3 W. This chip was manufactured on SMICS' 0.18 µm process and is known as China's first 64-bit microprocessor.

Cache

Main article: GS464 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$64 KiB
65,536 B
0.0625 MiB
L1I$32 KiB
32,768 B
0.0313 MiB
1x32 KiB  
L1D$32 KiB
32,768 B
0.0313 MiB
1x32 KiB  
Facts about "Godson-2B - Loongson"
l1$ size64 KiB (65,536 B, 0.0625 MiB) +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +