From WikiChip
Difference between revisions of "intel/core i5/i5-7400t"
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{{intel title|Core i5-7400T}} | {{intel title|Core i5-7400T}} | ||
{{mpu | {{mpu | ||
− | |||
| name = Core i5-7400T | | name = Core i5-7400T | ||
− | | no image = | + | | no image = Yes |
| image = | | image = | ||
| image size = | | image size = | ||
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| model number = i5-7400T | | model number = i5-7400T | ||
| part number = CM8067702867915 | | part number = CM8067702867915 | ||
− | | part number 1 = | + | | part number 1 = BXC80677I57400T |
− | | part number 2 = | + | | part number 2 = BX80677I57400T |
− | | | + | | s-spec = SR332 |
| market = Desktop | | market = Desktop | ||
− | | first announced = | + | | first announced = January 3, 2017 |
− | | first launched = 2017 | + | | first launched = January 3, 2017 |
| last order = | | last order = | ||
| last shipment = | | last shipment = | ||
+ | | release price = $187.00 | ||
| family = Core i5 | | family = Core i5 | ||
− | | series = | + | | series = i5-7400 |
| locked = Yes | | locked = Yes | ||
| frequency = 2,400 MHz | | frequency = 2,400 MHz | ||
− | | turbo frequency = | + | | turbo frequency = Yes |
− | | turbo frequency1 = | + | | turbo frequency1 = 3,000 MHz |
| turbo frequency2 = | | turbo frequency2 = | ||
| turbo frequency3 = | | turbo frequency3 = | ||
| turbo frequency4 = | | turbo frequency4 = | ||
− | |||
− | |||
− | |||
− | |||
| bus type = DMI 3.0 | | bus type = DMI 3.0 | ||
| bus speed = | | bus speed = | ||
| bus rate = 8 GT/s | | bus rate = 8 GT/s | ||
+ | | bus links = | ||
| clock multiplier = 24 | | clock multiplier = 24 | ||
− | |||
− | |||
− | |||
| cpuid = | | cpuid = | ||
+ | | isa family = x86 | ||
+ | | isa = x86-64 | ||
| microarch = Kaby Lake | | microarch = Kaby Lake | ||
− | | platform = | + | | platform = Kaby Lake |
− | | chipset = | + | | chipset = Sunrise Point |
+ | | chipset 2 = Union Point | ||
| core name = Kaby Lake S | | core name = Kaby Lake S | ||
| core family = 6 | | core family = 6 | ||
− | | core model = | + | | core model = 158 |
| core stepping = B0 | | core stepping = B0 | ||
+ | | core stepping 2 = | ||
| process = 14 nm | | process = 14 nm | ||
| transistors = | | transistors = | ||
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| die width = | | die width = | ||
| die length = | | die length = | ||
− | | word size = | + | | word size = 64 bit |
| core count = 4 | | core count = 4 | ||
| thread count = 4 | | thread count = 4 | ||
| max cpus = 1 | | max cpus = 1 | ||
− | | max memory = 64 | + | | max memory = 64 GiB |
− | |||
| electrical = Yes | | electrical = Yes | ||
− | + | | v core min = 0.55 V | |
− | | v core | + | | v core max = 1.52 V |
− | | v core | ||
− | |||
− | |||
| sdp = | | sdp = | ||
| tdp = 35 W | | tdp = 35 W | ||
− | | | + | | tdp typical = |
− | | | + | | ctdp down = |
− | | tjunc min = | + | | ctdp down frequency = 1,200 MHz |
− | | tjunc max = | + | | ctdp up = |
− | | tcase min = | + | | ctdp up frequency = |
− | | tcase max = | + | | tjunc min = 0 °C |
− | | tstorage min = | + | | tjunc max = 80 °C |
− | | | + | | tcase min = |
+ | | tcase max = | ||
+ | | tstorage min = -25 °C | ||
+ | | tstorage max = 125 °C | ||
+ | | tambient min = | ||
+ | | tambient max = | ||
− | + | | package module 1 = {{packages/intel/lga-1151}} | |
− | | package | ||
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− | |||
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}} | }} | ||
The '''Core i5-7400T''' is a {{arch|64}} [[x86]] [[quad-core microprocessor]] based on {{intel|Kaby Lake|l=arch}} and is set to be introduced by [[Intel]] in late 2016 or early 2017. This MPU operates at 2.4 GHz with a TDP of 35 W. | The '''Core i5-7400T''' is a {{arch|64}} [[x86]] [[quad-core microprocessor]] based on {{intel|Kaby Lake|l=arch}} and is set to be introduced by [[Intel]] in late 2016 or early 2017. This MPU operates at 2.4 GHz with a TDP of 35 W. |
Revision as of 03:37, 6 January 2017
Template:mpu The Core i5-7400T is a 64-bit x86 quad-core microprocessor based on Kaby Lake and is set to be introduced by Intel in late 2016 or early 2017. This MPU operates at 2.4 GHz with a TDP of 35 W.
Cache
- Main article: Kaby Lake § Cache
Cache Info [Edit Values] | ||
L1I$ | 128 KiB 131,072 B 0.125 MiB |
4x32 KiB 8-way set associative (per core, write-back) |
L1D$ | 128 KiB 131,072 B 0.125 MiB |
4x32 KiB 8-way set associative (per core, write-back) |
L2$ | 1 MiB 1,024 KiB 1,048,576 B 9.765625e-4 GiB |
4x256 KiB 4-way set associative (per core, write-back) |
L3$ | 6 MiB 6,144 KiB 6,291,456 B 0.00586 GiB |
shared |
Graphics
Integrated Graphic Information | |
GPU | Intel HD Graphics 630 |
Execution Units | 24 |
Displays | 3 |
Frequency | ? MHz "? MHz" is not a number.
|
Max frequency | ? GHz "? GHz" is not a number.
|
Max memory | 64 GB "GB" is not declared as a valid unit of measurement for this property.
|
Output | DisplayPort, Embedded DisplayPort, HDMI, DVI |
DirectX | 12.1 |
OpenGL | 4.4 |
OpenCL | 2.0 |
HDMI | 1.4 |
DP | 1.2 |
eDP | 1.3 |
Max HDMI Res | 4096x2304 @24 Hz |
Max DP Res | 4096x2304 @60 Hz |
Max eDP Res | 4096x2304 @60 Hz |
Intel Quick Sync Video | |
Intel InTru 3D | |
Intel Insider | |
Intel WiDi (Wireless Display) | |
Intel Clear Video |
Memory controller
Integrated Memory Controller | |
Type | DDR3L-1333, DDR3L-1600, DDR4-1866, DDR4-2133 |
Controllers | 1 |
Channels | 2 |
ECC Support | Yes |
Max bandwidth | 34.1 GB/s |
Max memory | 64 GB |
Expansions
Features
Facts about "Core i5-7400T - Intel"
has feature | integrated gpu + |
integrated gpu | Intel HD Graphics 630 + |
l1d$ description | 8-way set associative + |
l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |
l3$ description | shared + |
l3$ size | 6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) + |