From WikiChip
Difference between revisions of "intel/pentium gold/g4620"
< intel‎ | pentium gold

(+memory controller)
(+expansions)
Line 111: Line 111:
 
|bandwidth schan=17.88 GiB/s
 
|bandwidth schan=17.88 GiB/s
 
|bandwidth dchan=35.76 GiB/s
 
|bandwidth dchan=35.76 GiB/s
 +
}}
 +
 +
== Expansions ==
 +
{{expansions
 +
| pcie revision      = 3.0
 +
| pcie lanes        = 16
 +
| pcie config        = 1x16
 +
| pcie config 2      = 2x8
 +
| pcie config 3      = 1x8+2x4
 
}}
 
}}

Revision as of 22:12, 5 January 2017

Template:mpu Pentium G4620 is a 64-bit dual-core budget x86 desktop microprocessor introduced by Intel in early 2017. The G4620, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's improved 14nm+ process. This processor operates at 3.7 GHz with a TDP of 51 W and supports up to 64 GiB of dual-channel non-ECC DDR4-2400 memory. Additionally the G4620 incorporates Intel's HD Graphics 630 IGP operating at 350 MHz with a burst frequency of 1.1 GHz.

Cache

Main article: Kaby Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB4-way set associativewrite-back
L3$3 MiB
3,072 KiB
3,145,728 B
0.00293 GiB
  2x1.5 MiB write-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3L-1600, DDR4-2400
Supports ECCNo
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth35.76 GiB/s
36,618.24 MiB/s
38.397 GB/s
38,397.008 MB/s
0.0349 TiB/s
0.0384 TB/s
Bandwidth
Single 17.88 GiB/s
Double 35.76 GiB/s

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes16
Configs1x16, 2x8, 1x8+2x4
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/pentium_gold/g4620&oldid=32959"
Facts about "Pentium Gold G4620 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Pentium Gold G4620 - Intel#io +
has ecc memory supportfalse +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ size3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +
max memory bandwidth35.76 GiB/s (36,618.24 MiB/s, 38.397 GB/s, 38,397.008 MB/s, 0.0349 TiB/s, 0.0384 TB/s) +
max memory channels2 +
max pcie lanes16 +
supported memory typeDDR3L-1600 + and DDR4-2400 +