From WikiChip
Difference between revisions of "cavium/octeon/cn3005-300bg350-cp"
< cavium‎ | octeon

Line 1: Line 1:
{{cavium title|CN3005 300 MHz CP}}
+
{{cavium title|CN3005-300 CP}}
 
{{mpu
 
{{mpu
 
| name                = Cavium CN3005-300 CP
 
| name                = Cavium CN3005-300 CP

Revision as of 05:28, 8 December 2016

Template:mpu The CN3005-300 CP is a 64-bit single-core MIPS communication microprocessor (CP) designed by Cavium and introduced in 2005. This processor, which incorporates a single cnMIPS core, operates at 300 MHz and dissipates 2 Watts. This processors includes a number of hardware communication accelerators including units for high-performance packet I/O processing, QoS, and TCP acceleration.