From WikiChip
Difference between revisions of "intel/celeron/p4505"
< intel‎ | celeron

Line 30: Line 30:
 
| s-spec qs          =  
 
| s-spec qs          =  
 
| cpuid              = 0x20655
 
| cpuid              = 0x20655
 +
 +
| microarch          = Westmere
 +
| platform            = Calpella
 +
| chipset            = Ibex Peak
 +
| core name          = Arrandale
 +
| core family        = 6
 +
| core model          = 37
 +
| core stepping      = C2
 +
| process            = 32 nm
 +
| transistors        = 382,000,000
 +
| technology          = CMOS
 +
| die area            = 81 mm²
 +
| die width          =
 +
| die length          =
 +
| word size          = 64 bit
 +
| core count          = 2
 +
| thread count        = 2
 +
| max cpus            = 1
 +
| max memory          = 8 GiB
 +
 +
| electrical          = Yes
 +
| v core              =
 +
| v core tolerance    =
 +
| v io                =
 +
| v io tolerance      =
 +
| sdp                =
 +
| tdp                = 35 W
 +
| tjunc min          = 0 °C
 +
| tjunc max          = 90 °C
 +
| tcase min          =
 +
| tcase max          =
 +
| tstorage min        = -25 °C
 +
| tstorage max        = 125 °C
 +
| tambient min        =
 +
| tambient max        =
 +
 +
| package module 1    = {{packages/intel/bga-1288}}
 
}}
 
}}
 
'''Celeron P4505''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency of 1.86 GHz and a TDP of 35 W. This MPU is manufactured on a [[32 nm process]] based on the {{intel|Westmere|l=arch}} microarchitecture ({{intel|Arrandale|l=core}} core). This processor incorporated the {{intel|HD Graphics (Ironlake)}} [[IGP]] on the same package operating at a base frequency of 500.00 MHz and a burst frequency of 667.00 MHz.
 
'''Celeron P4505''' is a {{arch|64}} [[dual-core]] [[x86]] mobile microprocessor introduced by [[Intel]] in [[2010]]. This processor operates at a frequency of 1.86 GHz and a TDP of 35 W. This MPU is manufactured on a [[32 nm process]] based on the {{intel|Westmere|l=arch}} microarchitecture ({{intel|Arrandale|l=core}} core). This processor incorporated the {{intel|HD Graphics (Ironlake)}} [[IGP]] on the same package operating at a base frequency of 500.00 MHz and a burst frequency of 667.00 MHz.

Revision as of 02:38, 1 December 2016

Template:mpu Celeron P4505 is a 64-bit dual-core x86 mobile microprocessor introduced by Intel in 2010. This processor operates at a frequency of 1.86 GHz and a TDP of 35 W. This MPU is manufactured on a 32 nm process based on the Westmere microarchitecture (Arrandale core). This processor incorporated the HD Graphics (Ironlake) IGP on the same package operating at a base frequency of 500.00 MHz and a burst frequency of 667.00 MHz.

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/celeron/p4505&oldid=29906"
Facts about "Celeron P4505 - Intel"
RDF feed
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Celeron P4505 - Intel#package + and Celeron P4505 - Intel#io +
base frequency1,866.66 MHz (1.867 GHz, 1,866,660 kHz) +
bus links1 +
bus rate2,500 MT/s (2.5 GT/s, 2,500,000 kT/s) +
bus typeDMI 1.0 +
chipsetIbex Peak +
clock multiplier14 +
core count2 +
core family6 +
core model37 +
core nameArrandale +
core steppingC2 +
cpuid0x20655 +
designerIntel +
device id0x0046 +
die area81 mm² (0.126 in², 0.81 cm², 81,000,000 µm²) +
familyCeleron +
first announcedMarch 28, 2010 +
first launchedMarch 28, 2010 +
full page nameintel/celeron/p4505 +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureFlex Memory Access +, Enhanced SpeedStep Technology + and Extended Page Tables +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
instance ofmicroprocessor +
integrated gpuHD Graphics (Ironlake) +
integrated gpu base frequency500 MHz (0.5 GHz, 500,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units12 +
integrated gpu max frequency667 MHz (0.667 GHz, 667,000 KHz) +
isax86-64 +
isa familyx86 +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description4-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description8-way set associative +
l3$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldateMarch 28, 2010 +
manufacturerIntel +
market segmentMobile + and Embedded +
max cpu count1 +
max junction temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max memory bandwidth15.88 GiB/s (16,261.12 MiB/s, 17.051 GB/s, 17,051.02 MB/s, 0.0155 TiB/s, 0.0171 TB/s) +
max memory channels2 +
max pcie lanes16 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureWestmere +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberP4505 +
nameIntel Celeron P4505 +
packageBGA-1288 +
part numberCN80617004545AF +
platformCalpella +
process32 nm (0.032 μm, 3.2e-5 mm) +
s-specSLBQB +
seriesP4000 +
smp max ways1 +
supported memory typeDDR3-1066 +
tdp35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technologyCMOS +
thread count2 +
transistor count382,000,000 +
word size64 bit (8 octets, 16 nibbles) +