From WikiChip
Difference between revisions of "intel/atom x3/x3-c3130"
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== Cache == | == Cache == | ||
{{cache info | {{cache info | ||
− | |l2 cache=512 | + | |l2 cache=512 KiB |
− | |l2 break=1x512 | + | |l2 break=1x512 KiB |
|l2 extra=(per 2 cores) | |l2 extra=(per 2 cores) | ||
|l3 cache=0 KiB | |l3 cache=0 KiB |
Revision as of 00:35, 21 September 2016
Template:mpu The x3-C3130 is a dual-core 64-bit system-on-chip designed by Intel and introduced in March 2015. The x3-C3130 is intel's first SoC to integrate a 3G modem. Manufactured in 28 nm process and operating at 1 GHz, this SoC is aimed at entry-level smart phones. This SoC integrates an Arm Mali-400 MP2 GPU.
Contents
Cache
Cache Info [Edit Values] | ||
L2$ | 512 KiB 0.5 MiB 524,288 B 4.882812e-4 GiB |
1x512 KiB (per 2 cores) |
L3$ | 0 KiB 0 MiB 0 B 0 GiB |
No L3$ |
Graphics
Integrated Graphic Information | |
GPU | Mali-400 MP2 |
Displays | 1 |
Frequency | 480 MHz 0.48 GHz
480,000 KHz |
Output | DSI |
OpenGL ES | 2.0 |
Max DSI Res | 1280x800 @60 Hz |
Memory controller
Integrated Memory Controller | |
Type | LPDDR2-800 |
Controllers | 1 |
Channels | 1 |
ECC Support | No |
Max bandwidth | 3,200 MB/s |
Max memory | 1024 MB |
Input/Output
- USB Revision: 2.0 OTG
- USB Ports: 1
- GP I/O: 2x I2C
- UART: 2x USIF
- GLONASS
Storage
- eMMC 4.41
Features
Networking
- RF Transceiver: A-GOLD 620
- Baseband Functions: HSDPA+ 21Mbps HSUPA 5.8 Mbps, GSM/GPRS/EDGE, DSDS
- RF Transceiver Functions: Low power multimode multiband transceiver for 3G 2.5G 2G
- Wi-Fi: 802.11 B/G/N
- Bluetooth: 4.0 LE
- GPS & GLONASS
- FM Radio
- Protocol Stack: Intel Release 9 Protocol Stack
ISP/Camera
- Up to 13 MP/5 MP
Facts about "Atom x3-C3130 - Intel"
has feature | integrated gpu + |
integrated gpu | Mali-400 MP2 + |
integrated gpu base frequency | 480 MHz (0.48 GHz, 480,000 KHz) + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ description | No L3$ + |
l3$ size | 0 MiB (0 KiB, 0 B, 0 GiB) + |