Difference between revisions of "intel/core i7/i7-4950hq"

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Revision as of 23:57, 20 September 2016

Template:mpu Core i7-4950HQ is a quad core 64-bit microprocessor designed by Intel in 2013. The microprocessor is based on the Haswell microarchitecture. This MPU includes the Intel Iris Pro 5200 integrated graphic and features a large 128 MB L4$ cache called Crystal Well.

1 Cache
2 Graphics
3 Memory controller
4 Features

Cache

Main article: Haswell § Cache

This specific microprocessor includes the Crystal Well cache.

Cache Info [Edit Values]
L1I$	128 KiB 131,072 B 0.125 MiB	4x32 KiB 8-way set associative (per core, write-back)
L1D$	128 KiB 131,072 B 0.125 MiB	4x32 KiB 8-way set associative (per core, write-back)
L2$	1 MiB 1,024 KiB 1,048,576 B 9.765625e-4 GiB	4x256 KiB 8-way set associative (per core, write-back)
L3$	6 MiB 6,144 KiB 6,291,456 B 0.00586 GiB	12-way set associative (shared)
L4$	128 MiB 131,072 KiB 134,217,728 B 0.125 GiB	16-way set associative (see Crystal Well)

Graphics

Integrated Graphic Information
GPU	Intel Iris Pro Graphics 5200
Displays	3
Frequency	200 MHz 0.2 GHz 200,000 KHz
Max frequency	1300 MHz 1.3 GHz 1,300,000 KHz
Output	DisplayPort, Embedded DisplayPort, HDMI, VGA
DirectX	11.2, 12
OpenGL	4.3
Max HDMI Res	3840x2160 @60Hz
Max DP Res	3840x2160 @60Hz
Max VGA Res	2880x1800 @60Hz

Memory controller

Integrated Memory Controller
Type	DDR3L-1333, DDR3L-1600
Controllers	1
Channels	2
ECC Support	No
Max bandwidth	25,600 MB/s
Max memory	32,768 MB

Features

Template:mpu features

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i7/i7-4950hq&oldid=25627"

Facts about "Core i7-4950HQ - Intel"

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Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Core i7-4950HQ - Intel#package +
base frequency	2,400 MHz (2.4 GHz, 2,400,000 kHz) +
bus rate	5,000 MT/s (5 GT/s, 5,000,000 kT/s) +
bus type	DMI 2.0 +
clock multiplier	24 +
core count	4 +
core family	06 +
core model	46 +
core stepping	C0 +
designer	Intel +
family	Core i7 +
first announced	June 2, 2013 +
first launched	June 4, 2013 +
full page name	intel/core i7/i7-4950hq +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has feature	Crystal Well +, integrated gpu +, Trusted Execution Technology +, Transactional Synchronization Extensions +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Advanced Vector Extensions +, Advanced Vector Extensions 2 + and Advanced Encryption Standard Instruction Set Extension +
has intel trusted execution technology	true +
has intel turbo boost technology 2 0	true +
has locked clock multiplier	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	Intel Iris Pro Graphics 5200 +
integrated gpu base frequency	200 MHz (0.2 GHz, 200,000 KHz) +
integrated gpu max frequency	1,300 MHz (1.3 GHz, 1,300,000 KHz) +
l1d$ description	8-way set associative +
l1d$ size	128 KiB (131,072 B, 0.125 MiB) +
l1i$ description	8-way set associative +
l1i$ size	128 KiB (131,072 B, 0.125 MiB) +
l2$ description	8-way set associative +
l2$ size	1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description	12-way set associative +
l3$ size	6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) +
l4$ description	16-way set associative +
l4$ size	128 MiB (131,072 KiB, 134,217,728 B, 0.125 GiB) +
last order	May 22, 2015 +
last shipment	November 20, 2015 +
ldate	June 4, 2013 +
manufacturer	Intel +
market segment	Mobile +
max cpu count	1 +
max memory	32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB, 0.0313 TiB) +
max operating temperature	100 C +
microarchitecture	Haswell +
model number	i7-4950HQ +
name	Intel Core i7-4950HQ +
package	FCBGA-1364 +
part number	CL8064701509700 +
platform	Shark Bay +
process	22 nm (0.022 μm, 2.2e-5 mm) +
s-spec	SR18G +
smp max ways	1 +
tdp	47 W (47,000 mW, 0.063 hp, 0.047 kW) +
thread count	8 +
turbo frequency (1 core)	3,600 MHz (3.6 GHz, 3,600,000 kHz) +
turbo frequency (2 cores)	3,500 MHz (3.5 GHz, 3,500,000 kHz) +
turbo frequency (3 cores)	3,400 MHz (3.4 GHz, 3,400,000 kHz) +
turbo frequency (4 cores)	3,400 MHz (3.4 GHz, 3,400,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +

@@ Line 59: / Line 59: @@
 == Cache ==
+{{main|intel/microarchitectures/haswell#Memory_Hierarchy|l1=Haswell § Cache}}
 This specific microprocessor includes the [[has feature::Crystal Well]] cache.
 {{cache info
-|l1i cache=128 KB
+|l1i cache=128 KiB
-|l1i break=4x32 KB
+|l1i break=4x32 KiB
 |l1i desc=8-way set associative
 |l1i extra=(per core, write-back)
-|l1d cache=128 KB
+|l1d cache=128 KiB
-|l1d break=4x32 KB
+|l1d break=4x32 KiB
 |l1d desc=8-way set associative
 |l1d extra=(per core, write-back)
-|l2 cache=1 MB
+|l2 cache=1 MiB
-|l2 break=4x256 KB
+|l2 break=4x256 KiB
 |l2 desc=8-way set associative
 |l2 extra=(per core, write-back)

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