-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Difference between revisions of "amd/am486/am486dxlv-33"
(→Cache) |
|||
Line 81: | Line 81: | ||
{{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | {{main|intel/microarchitectures/80486#Memory_Hierarchy|l1=80486 § Cache}} | ||
{{cache info | {{cache info | ||
− | |l1 cache=8 | + | |l1 cache=8 KiB |
− | |l1 break=1x8 | + | |l1 break=1x8 KiB |
|l1 desc=4-way set associative | |l1 desc=4-way set associative | ||
|l1 extra=(unified, write-through policy) | |l1 extra=(unified, write-through policy) |
Revision as of 21:43, 20 September 2016
Template:mpu Am486DXLV-33 was an 80486-compatible microprocessor introduced by AMD in mid-1993. This processor had a clock frequency of 33 MHz. This is a low voltage version of the Am486DX-33
Cache
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics
This chip had no integrated graphics processing unit.