Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "amd/am186/ic80186-3"
(→Documents) |
(→Cache) |
||
| Line 79: | Line 79: | ||
{{main|intel/microarchitectures/80186#Memory_Hierarchy|l1=80186 § Cache}} | {{main|intel/microarchitectures/80186#Memory_Hierarchy|l1=80186 § Cache}} | ||
{{cache info | {{cache info | ||
| − | |l1 cache=0 | + | |l1 cache=0 KiB |
| − | |l1 break=1x0 | + | |l1 break=1x0 KiB |
|l1 desc= | |l1 desc= | ||
|l1 extra= | |l1 extra= | ||
| − | |l2 cache=0 | + | |l2 cache=0 KiB |
| − | |l2 break=1x0 | + | |l2 break=1x0 KiB |
}} | }} | ||
Revision as of 21:18, 20 September 2016
Template:mpu IC80186-3 is a 16-bit 80186-based microprocessor designed by Intel and manufactured by AMD. This chip operated at 8 MHz and was enclosed in a 68-pin Ceramic Leadless Chip Carrier. This model is the industrial temp spec version of the C80186-3.
Contents
Cache
- Main article: 80186 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 0 KiB 0 B 0 MiB |
1x0 KiB |
| L2$ | 0 KiB 0 MiB 0 B 0 GiB |
1x0 KiB |
Graphics
This chip had no integrated graphics processing unit.
Features
- Burn-in processing (Part number IC80186-3B ONLY)
- 10 new instructions
- Two DMA channels
- Three programmable interrupt timers
- Local Bus Controller
- Object code-compatible with all 86/88 software
Documents
- AMD 80186 (1985), Publication #03551 Rev C