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Difference between revisions of "vhdl"
(Created page with "{{title|VHDL}} '''VHDL''' ('''V'''HSIC '''HDL'''), pronounce V-H-D-L is a hardware description language used in the design, simulation, and verification of d...") |
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− | '''VHDL''' ([[VHSIC|'''V'''HSIC]] '''[[HDL]]'''), pronounce V-H-D-L is a [[hardware description language]] used in the design, simulation, and verification of digital logic circuits and digital systems. More recently, VHDL has also been used as a general-purpose highly-concurrent [[programming language]]. | + | '''VHDL''' ([[VHSIC|'''V'''HSIC]] '''[[HDL]]'''), pronounce V-H-D-L, is a [[hardware description language]] used in the design, simulation, and verification of digital logic circuits and digital systems. More recently, VHDL has also been used as a general-purpose highly-concurrent [[programming language]]. |
Revision as of 17:03, 25 July 2016
VHDL (VHSIC HDL), pronounce V-H-D-L, is a hardware description language used in the design, simulation, and verification of digital logic circuits and digital systems. More recently, VHDL has also been used as a general-purpose highly-concurrent programming language.