Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "ambric/am2000/am2024"
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Revision as of 18:05, 24 June 2016
Template:mpu Am2024 was an MPPA introduced in late 2006 by Ambric. This model was made of 24 Brics arranged as a grid, making up a total of 192 32-bit RICS-like cores operating asynchronously at 1-333 MHz.
Architecture
- Main article: Am2000 § Architecture
The Am2024 is made of 24 homogeneous 'Brics' laid out in a grid to form 192 cores and 192 RAM units.
General layout:
- 24x Brics
Cache
The Am2035 contains 24 Brics, each with its own RAM Unit (RU) of 13 kB of SRAM for a total of 312 kB of SRAM.
Memory controller
| Integrated Memory Controller | |
| Type | DDR2-400 |
| Controllers | 2 |
| Channels | 1 |
| Max memory | 4 GB |
Expansions
- PCIe
- JTAG
- GPIO @ 100 MHz
- serial flash