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Difference between revisions of "hitachi/6309"
< hitachi

 
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| arch              = 8-bit with support for 16/32 arithmetic
 
| arch              = 8-bit with support for 16/32 arithmetic
 
| isa              = 6309
 
| isa              = 6309
| word              = 8-bit
+
| word              = 8 bit
 
| proc              =  
 
| proc              =  
 
| tech              = CMOS
 
| tech              = CMOS

Latest revision as of 23:54, 18 May 2016

Hitachi 6309
hd63c09ep.jpg
HD63C09EP
Developer Motorola, Hitachi
Manufacturer Hitachi
Type Microprocessors
Introduction 1982 (launch)
Architecture 8-bit with support for 16/32 arithmetic
ISA 6309
Word size 8 bit
1 octets
2 nibbles
Technology CMOS
Clock 1 MHz-5 MHz
Package DIP40, CG40, CP44, FP52, FP54

The 6309 was a family of 8-bit CMOS microprocessors designed by Hitachi and released in late 1982. The 6309 was advertised and marketed as a licensed low-power CMOS version of the Motorola 6809. This chip was also compatible with rest of the components in Hitachi's HMCS-6800 family.

Renewed interest in the 6309 was brought about during the late 1980s (Japan) and 1992 (US/Europe) when a number of previously unknown and undocumented features surfaced. Some of those features were quite considerable for the time - including hardware support for 32-bit arithmetic, block transfer, bit manipulation, and faster operations.

History[edit]

Hitachi released the 6309 in late 1982 as a licensed second source for the 6809. The 6309 was advertised and sold as 100% compatible CMOS version of 6809. Being more power efficient and cooler, the 6309 became quite popular in the CoCo community as a replacement in their systems. Various observable differences in the two microprocessors were spotted very early on - particularly in the way illegal instructions were being handled. Those reports were simply seen as possible bugs in the Hitachi version.

One of the earliest publications explaining some of the differences in the 6309 came from the Japanese Personal Computer Magazine "Oh!FM" published by SoftBank. In their April 1988 issue, it was revealed that the 6309 actually run in emulation mode by default and could in fact be switched to run in native mode which had a large set of extended features including additional registers, 32-bit quad-word arithmetic, and a number of trap modes. It wasn't until 4 years later in 1992 when Hirotsugu Kakugawa, a computer engineering graduate student from Japan, posted a memo named "A MEMO ON THE SECRET FEATURES OF 6309" to comp.sys.m6809 exposing those features in English from the Oh!FM magazine.

possible reasons[edit]

There has been a number of speculations as to why Hitachi never documented those features. In fact, even to date, Hitachi has never officially confirmed their existence. Hitachi has been known to make minor tweaks and adjustments to products they license whenever they see fit. It has been speculated that their contract with Motorola simply restricted them from doing the same with the 6809. It's entirely possible Hitachi chosen to not document those features to steer clear of legal issues.

Members[edit]

Part Clock OP Temp Packages Notes
HD63B09 2 MHz -20 °C - 75 °C HD63B09P - DIP40
HD63B09E 2 MHz (Ext.) -20 °C - 75 °C HD63B09EP - DIP40 External clock
HD63C09 3 MHz -20 °C - 75 °C HD63C09P - DIP40
HD63C09E 3 MHz (Ext.) -20 °C - 75 °C HD63C09EP - DIP40 External clock

Design[edit]

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ISA[edit]

Main article: ISA
New text document.svg This section is empty; you can help add the missing info by editing this page.

See also[edit]

Facts about "6309 - Hitachi"
designerMotorola + and Hitachi +
first launched1982 +
full page namehitachi/6309 +
instance ofmicroprocessor family +
instruction set architecture6309 +
main designerMotorola +
manufacturerHitachi +
nameHitachi 6309 +
packageDIP40 +, CG40 +, CP44 +, FP52 + and FP54 +
technologyCMOS +
word size8 bit (1 octets, 2 nibbles) +