Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "amd/am486/am486dx2-80sv8b"
| Line 25: | Line 25: | ||
| bus type = FSB | | bus type = FSB | ||
| bus speed = 40 MHz | | bus speed = 40 MHz | ||
| − | | bus rate = | + | | bus rate = 40 MT/s |
| clock multiplier = 2 | | clock multiplier = 2 | ||
| cpuid = | | cpuid = | ||
Revision as of 04:41, 17 May 2016
Template:mpu Am486DX2-80SV8B was an Enhanced Am486 microprocessor introduced by AMD in 1996. This processor had a clock multiplier of 2 having base frequency of 80 MHz with a bus frequency of 40 MHz. This "Enhanced" Am486 includes some other features such as SMM, stop-clock control, and write-back cache.
Contents
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KB "KB" is not declared as a valid unit of measurement for this property. |
1x8 KB 4-way set associative (unified, write-back policy) |
Graphics
This chip had no integrated graphics processing unit.
Features
- Stop-clock control
- System Management Mode (SMM)
Documents
See also
Facts about "Am486DX2-80SV8B - AMD"
| has feature | System Management Mode + |
| l1$ description | 4-way set associative + |