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Difference between revisions of "amd/am486/am486dx4-75sv8b"
< amd‎ | am486

(Created page with "{{amd title|Am486DX4-75SV8B}} {{mpu | name = Am486DX4-75SV8B | no image = Yes | image = | image size = | caption...")
 
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| socket 0 3          = Socket 3
 
| socket 0 3          = Socket 3
 
| socket 0 3 type    =  
 
| socket 0 3 type    =  
 +
| package 1          = SQFP-208
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| package 1 type      = SQFP
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| package 1 pins      = 208
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| package 1 pitch    = 0.5 mm
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| package 1 width    = 30.35 mm
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| package 1 length    = 30.35 mm
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| package 1 height    = 3.8 mm
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| socket 1            =
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| socket 1 type      =
 
}}
 
}}
 
'''Am486DX4-75SV8B''' was an Enhanced {{amd|Am486}} microprocessor introduced by [[AMD]] in 1996. This processor had a clock multiplier of 3 having a frequency of 75 MHz with a bus frequency of 25 MHz. This "Enhanced" Am486 includes some other features such as SMM, stop-clock control, and write-back cache.
 
'''Am486DX4-75SV8B''' was an Enhanced {{amd|Am486}} microprocessor introduced by [[AMD]] in 1996. This processor had a clock multiplier of 3 having a frequency of 75 MHz with a bus frequency of 25 MHz. This "Enhanced" Am486 includes some other features such as SMM, stop-clock control, and write-back cache.
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== Features ==
 
== Features ==
 +
* Stop-clock control
 
* [[has feature::System Management Mode]] (SMM)
 
* [[has feature::System Management Mode]] (SMM)
 +
 +
== Packaging ==
 +
{| class="wikitable"
 +
! Part !! Package
 +
|-
 +
| A80486DX4-75SV8B || CPGA-168
 +
|-
 +
| S80486DX4-75SV8B || SQFP-208
 +
|}
 +
 +
== Documents ==
 +
* [[:File:AMD Enhanced Am486 (March, 1996).pdf|AMD Enhanced Am486 (March, 1996)]]
  
 
== See also ==
 
== See also ==
 
* {{amd|Am486|Am486 family}}
 
* {{amd|Am486|Am486 family}}

Revision as of 01:14, 17 May 2016

Template:mpu Am486DX4-75SV8B was an Enhanced Am486 microprocessor introduced by AMD in 1996. This processor had a clock multiplier of 3 having a frequency of 75 MHz with a bus frequency of 25 MHz. This "Enhanced" Am486 includes some other features such as SMM, stop-clock control, and write-back cache.

Cache

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KB
"KB" is not declared as a valid unit of measurement for this property.
1x8 KB 4-way set associative (unified, write-back policy)

Graphics

This chip had no integrated graphics processing unit.

Features

  • Stop-clock control
  • System Management Mode (SMM)

Packaging

Part Package
A80486DX4-75SV8B CPGA-168
S80486DX4-75SV8B SQFP-208

Documents

See also

Facts about "Am486DX4-75SV8B - AMD"
has featureSystem Management Mode +
l1$ description4-way set associative +