From WikiChip
Difference between revisions of "intel/80486/486dx4-75"
Line 34: | Line 34: | ||
| s-spec 4 = SX871 | | s-spec 4 = SX871 | ||
| s-spec 5 = SX884 | | s-spec 5 = SX884 | ||
+ | | s-spec 6 = SK052 | ||
+ | | s-spec 7 = SK100 | ||
+ | | s-spec 8 = SX870 | ||
+ | | s-spec 9 = SX883 | ||
| s-spec es = | | s-spec es = | ||
| s-spec qs = | | s-spec qs = |
Revision as of 15:41, 11 May 2016
Template:mpu i486DX4-75 was a fourth-generation x86 microprocessor introduced by Intel in 1994. This chip, which is based on the 80486 microarchitecture, had a clock multiplier of x2, x2.5, and x3 with a max operating frequency of 75 MHz, three times the bus frequency. Like the original i486DX, this chip implemented the 80387 FPU on-die and incorporated System Management Mode (SMM). The DX4 series had twice as much cache space as the older processors.
Contents
Cache
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 16 KB "KB" is not declared as a valid unit of measurement for this property. |
1x16 KB 4-way set associative (unified, write-through policy) |
Graphics
This chip had no integrated graphics processing unit.
Features
- System Management Mode (SMM)