From WikiChip
Difference between revisions of "intel/80486/486dx-25"
Line 28: | Line 28: | ||
| bus rate = 25 MT/s | | bus rate = 25 MT/s | ||
| clock multiplier = 1 | | clock multiplier = 1 | ||
− | | s-spec = | + | | s-spec = SX250 |
+ | | s-spec 2 = SX300 | ||
+ | | s-spec 3 = SX308 | ||
+ | | s-spec 4 = SX328 | ||
+ | | s-spec 5 = SX418 | ||
+ | | s-spec 6 = SX493 | ||
+ | | s-spec 7 = SX728 | ||
| s-spec es = | | s-spec es = | ||
− | | s-spec qs = | + | | s-spec qs = Q0143 |
− | | cpuid = | + | | cpuid = 401 |
+ | | cpuid = 402 | ||
+ | | cpuid = 404 | ||
| microarch = 80486 | | microarch = 80486 | ||
Line 51: | Line 59: | ||
| electrical = Yes | | electrical = Yes | ||
− | | power = | + | | power = 2.75 W |
| v core = 5 V | | v core = 5 V | ||
− | | v core tolerance = | + | | v core tolerance = 5% |
| temp max = 85 °C | | temp max = 85 °C | ||
| temp min = 0 °C | | temp min = 0 °C |
Revision as of 15:20, 11 May 2016
Template:mpu i486DX-25 was a fourth-generation x86 microprocessor introduced by Intel in 1989. This chip, which is based on the 80486 microarchitecture, operated at 25 MHz. This chip implemented the 80387 FPU on-die and incorporated System Management Mode (SMM).
Contents
Cache
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 8 KB "KB" is not declared as a valid unit of measurement for this property. |
1x8 KB 4-way set associative (unified, write-through policy ) |
Graphics
This chip had no integrated graphics processing unit.
Features
- System Management Mode (SMM)