Difference between revisions of "intel/xeon d/d-1559"

From WikiChip

< intel‎ | xeon d

Revision as of 15:57, 7 May 2016

Template:mpu The Xeon D-1559 is a 64-bit octa-core x86-64 microserver SoC that was introduced by Intel in April of 2016. The D-1559 operates at 1.5 GHz with a turbo frequency of 2.1 GHz. This chip, which is based on the Broadwell microarchitecture and manufactured in 14 nm process, has a TDP of 45 W and can support up to 128 GB of RAM (DDR3L/DDR4).

1 Cache
2 Graphics
3 Memory controller
4 Expansions
5 Networking
6 Features

Cache

Main article: Broadwell § Cache

Cache Info [Edit Values]
L1I$	384 KB "KB" is not declared as a valid unit of measurement for this property.	12x32 KB 8-way set associative (per core)
L1D$	384 KB "KB" is not declared as a valid unit of measurement for this property.	12x32 KB 8-way set associative (per core)
L2$	3 MB "MB" is not declared as a valid unit of measurement for this property.	12x256 KB 8-way set associative (per core)
L3$	18 MB "MB" is not declared as a valid unit of measurement for this property.	8x1.5 MB (per core)

Graphics

This SoC has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type	DDR3L-1333, DDR3L-1600, DDR4-1600, DDR4-1867, DDR4-2133
Controllers	1
Channels	2
ECC Support	Yes
Max memory	128 GB

Expansions

Template:mpu expansions

Networking

Networking
SFI interface	Yes
KR interface	Yes
KR4 interface	No
KX interface	Yes
KX4 interface	No
10Base-T	No
100Base-T	No
1000Base-T	Yes
10GBase-T	Yes

Features

Template:mpu features

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_d/d-1559&oldid=18121"

Facts about "Xeon D-1559 - Intel"

RDF feed

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Xeon D-1559 - Intel#pcie +
back image	+
base frequency	1,500 MHz (1.5 GHz, 1,500,000 kHz) +
bus type	DMI 2.0 +
clock multiplier	15 +
core count	12 +
core family	6 +
core model	6 +
core name	Broadwell DE +
core stepping	Y0 +
designer	Intel +
die area	306.18 mm² (0.475 in², 3.062 cm², 306,180,000 µm²) +
family	Xeon D +
first announced	April 2016 +
first launched	April 2016 +
full page name	intel/xeon d/d-1559 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has ecc memory support	true +
has extended page tables support	true +
has feature	Trusted Execution Technology +, Transactional Synchronization Extensions +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Secure Key Technology + and OS Guard +
has intel enhanced speedstep technology	true +
has intel secure key technology	true +
has intel supervisor mode execution protection	true +
has intel trusted execution technology	true +
has intel turbo boost technology 2 0	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	768 KiB (786,432 B, 0.75 MiB) +
l1d$ description	8-way set associative +
l1d$ size	384 KiB (393,216 B, 0.375 MiB) +
l1i$ description	8-way set associative +
l1i$ size	384 KiB (393,216 B, 0.375 MiB) +
l2$ description	8-way set associative +
l2$ size	3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) +
l3$ description	16-way set associative +
l3$ size	18 MiB (18,432 KiB, 18,874,368 B, 0.0176 GiB) +
ldate	April 2016 +
main image	+
manufacturer	Intel +
market segment	Server + and Embedded +
max cpu count	1 +
max memory	131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory bandwidth	31.78 GiB/s (32,542.72 MiB/s, 34.124 GB/s, 34,123.515 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels	2 +
max operating temperature	85 °C +
max sata ports	6 +
max usb ports	4 +
microarchitecture	Broadwell +
min operating temperature	-40 °C +
model number	D-1559 +
name	Xeon D-1559 +
package	FCBGA-1667 +
part number	GG8067402570801 +
platform	Grangeville +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 727.00 (€ 654.30, £ 588.87, ¥ 75,120.91) +
release price (tray)	$ 727.00 (€ 654.30, £ 588.87, ¥ 75,120.91) +
s-spec	SR2M5 +
series	D-1500 +
smp max ways	1 +
supported memory type	DDR4-2133 +
tdp	45 W (45,000 mW, 0.0603 hp, 0.045 kW) +
technology	CMOS +
thread count	24 +
transistor count	4,700,000,000 +
turbo frequency (1 core)	2,100 MHz (2.1 GHz, 2,100,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +

@@ Line 35: / Line 35: @@
 | platform            = Grangeville
 | core name           = Broadwell DE
-| core family         = 6
-| core model          = 6
 | core stepping       = Y0
 | process             = 14 nm

WikiChip

The Fuse Coverage

Social Media

Companies

Microarchitectures

Technology Nodes

Intel

AMD

ARM

Cavium

Samsung

Intel

AMD

Ampere

Apple

Cavium

HiSilicon

MediaTek

NXP

Qualcomm

Renesas