From WikiChip
Difference between revisions of "intel/xeon d/d-1539"
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− | | bus type = | + | | bus type = DMI 2.0 |
| bus speed = | | bus speed = | ||
− | | clock multiplier = | + | | clock multiplier = 16 |
| s-spec = SR2DH | | s-spec = SR2DH | ||
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| package = FCBGA1667 | | package = FCBGA1667 | ||
| package type = FCBGA | | package type = FCBGA | ||
− | | package pitch = | + | | package pitch = 0.7 mm |
− | | package size = | + | | package size = 37.5 mm x 37.5 mm x 3.557 mm |
| socket = BGA1667 | | socket = BGA1667 | ||
| socket type = BGA | | socket type = BGA |
Revision as of 16:35, 7 May 2016
Template:mpu The Xeon D-1539 is a 64-bit octa-core x86-64 microserver SoC that was introduced by Intel in April of 2016. The D-1539 operates at 1.6 GHz with a turbo frequency of 2.2 GHz. This chip, which is based on the Broadwell microarchitecture and manufactured in 14 nm process, has a TDP of 35 W and can support up to 128 GB of RAM (DDR3L/DDR4).
Cache
- Main article: Broadwell § Cache
Cache Info [Edit Values] | ||
L1I$ | 256 KB "KB" is not declared as a valid unit of measurement for this property. |
8x32 KB 8-way set associative (per core) |
L1D$ | 256 KB "KB" is not declared as a valid unit of measurement for this property. |
8x32 KB 8-way set associative (per core) |
L2$ | 2 MB "MB" is not declared as a valid unit of measurement for this property. |
8x256 KB 8-way set associative (per core) |
L3$ | 12 MB "MB" is not declared as a valid unit of measurement for this property. |
8x1.5 MB (per core) |
Graphics
This SoC has no integrated graphics processing unit.
Memory controller
Integrated Memory Controller | |
Type | DDR3L-1333, DDR3L-1600, DDR4-1600, DDR4-1867, DDR4-2133 |
Controllers | 1 |
Channels | 2 |
ECC Support | Yes |
Max memory | 128 GB |
Expansions
Networking
Networking | |
SFI interface | Yes |
KR interface | Yes |
KR4 interface | No |
KX interface | Yes |
KX4 interface | No |
10Base-T | No |
100Base-T | No |
1000Base-T | Yes |
10GBase-T | Yes |
Features
Facts about "Xeon D-1539 - Intel"
l1d$ description | 8-way set associative + |
l1i$ description | 8-way set associative + |
l2$ description | 8-way set associative + |