Semiconductor & Computer Engineering
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Difference between revisions of "intel/mobile pentium ii/400"
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| s-spec 3 = SL3JW | | s-spec 3 = SL3JW | ||
| s-spec es = | | s-spec es = | ||
| − | | s-spec qs = | + | | s-spec qs = QB59 |
| cpuid = 066Ah | | cpuid = 066Ah | ||
| cpuid 2 = | | cpuid 2 = | ||
Revision as of 16:22, 30 April 2016
Template:mpu The Mobile Pentium II 400 is a 32-bit x86 microprocessor, part of the Mobile Pentium II family, which operated at 400 MHz. This was the Pentium II Mobile family's highest performance processor. This processor had a TDP of 13.1 Watts. This chip was manufactured in 250 nm process and includes a smaller 256 KB of L2$ on-die. This is the only processor in the family to later be manufactured in 180 nm.
Contents
Cache
- Main article: P6's Cache
| Cache Info [Edit Values] | ||
| L1I$ | 16 KB "KB" is not declared as a valid unit of measurement for this property. |
1x16 KB 4-way set associative |
| L1D$ | 16 KB "KB" is not declared as a valid unit of measurement for this property. |
1x16 KB 4-way set associative |
| L2$ | 256 KB "KB" is not declared as a valid unit of measurement for this property. |
1x256 KB 4-way set associative (on-die) |
Graphics
This processor has no integrated graphics processing unit.
Memory controller
This processor has no integrated memory controller.
Features
Facts about "Mobile Pentium II 400 - Intel"
| base frequency | 400 MHz (0.4 GHz, 400,000 kHz) + |
| bus speed | 66 MHz (0.066 GHz, 66,000 kHz) + |
| bus type | FSB + |
| clock multiplier | 6 + |
| core count | 1 + |
| core family | 6 + |
| core model | 6 + |
| core name | Dixon + |
| core stepping | mqpA1 +, mqbA1 + and mdxA0 + |
| core voltage | 1.55 V (15.5 dV, 155 cV, 1,550 mV) + |
| cpuid | 066Ah + |
| designer | Intel + |
| die area | 180 mm² (0.279 in², 1.8 cm², 180,000,000 µm²) + |
| family | Mobile Pentium II + |
| first announced | 1999 + |
| first launched | June 14, 1999 + |
| full page name | intel/mobile pentium ii/400 + |
| has locked clock multiplier | true + |
| instance of | microprocessor + |
| l1d$ description | 4-way set associative + |
| l1d$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
| l1i$ description | 4-way set associative + |
| l1i$ size | 16 KiB (16,384 B, 0.0156 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) + |
| ldate | June 14, 1999 + |
| manufacturer | Intel + |
| market segment | Mobile + |
| max cpu count | 1 + |
| max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) + |
| max operating temperature | 85 °C + |
| microarchitecture | P6 + |
| min operating temperature | -40 °C + |
| model number | 400 + |
| name | Mobile Pentium II 400 + |
| part number | KP80524TX400256 + and PMG40002002AA + |
| process | 250 nm (0.25 μm, 2.5e-4 mm) + and 180 nm (0.18 μm, 1.8e-4 mm) + |
| s-spec | SL3BW +, SL3EM + and SL3JW + |
| s-spec (qs) | QB59 +, QB65 + and QC87 + |
| smp max ways | 1 + |
| tdp | 13.1 W (13,100 mW, 0.0176 hp, 0.0131 kW) + |
| technology | CMOS + |
| thread count | 1 + |
| transistor count | 27,400,000 + |
| word size | 32 bit (4 octets, 8 nibbles) + |