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(Created page with "{{intel title|Broadwell|arch}} '''Broadwell''' is Intel's microarchitecture based on the 14 nm process for mobile, desktops, and servers. Introduced in early 2015...")
 
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{{intel title|Broadwell|arch}}
 
{{intel title|Broadwell|arch}}
 +
{{microarchitecture
 +
| name          = Broadwell
 +
| manufacturer  = Intel
 +
| introduction  = October, 2014
 +
| phase-out    =
 +
| process      = 14 nm
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| cores        = 2
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| cores 2      = 4
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| cores 3      = 6
 +
| cores 4      = 8
 +
| cores 5      = 16
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| cores 6      = 32
 +
 +
| pipeline      = Yes
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| type          = Superscalar
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| OoOE          = Yes
 +
| speculative  = Yes
 +
| renaming      = Yes
 +
| isa          = IA-32
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| isa 2        = x86-64
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| stages min    = 14
 +
| stages max    = 19
 +
| issues        = 4
 +
 +
| inst          = Yes
 +
| feature      =
 +
| extension    = MOVBE
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| extension 2  = MMX
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| extension 3  = SSE
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| extension 4  = SSE2
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| extension 5  = SSE3
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| extension 6  = SSSE3
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| extension 7  = SSE4.1
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| extension 8  = SSE4.2
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| extension 9  = POPCNT
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| extension 10  = AVX
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| extension 11  = AVX2
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| extension 12  = AES
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| extension 13  = PCLMUL
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| extension 14  = FSGSBASE
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| extension 15  = RDRND
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| extension 16  = FMA
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| extension 17  = BMI
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| extension 18  = BMI2
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| extension 19  = F16C
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| extension 20  = RDSEED
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| extension 21  = ADCX
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| extension 22  = PREFETCHW
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| cache        = Yes
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| l1i          = 32 KB
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| l1i per      = core
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| l1i desc      = 8-way set associative
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| l1d          = 32 KB
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| l1d per      = core
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| l1d desc      = 8-way set associative
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| l2            = 256 KB
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| l2 per        = core
 +
| l2 desc      = 8-way set associative
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| l3            = 1.5 MB
 +
| l3 per        = core
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| l3 desc      =
 +
 +
| core names      = Yes
 +
| core name        = Broadwell Y
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| core name 2      = Broadwell U
 +
| core name 2      = Broadwell H
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| core name 2      = Broadwell DT
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| core name 2      = Broadwell EP
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| core name 2      = Broadwell EX
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| core name N      = Broadwell E
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 +
| succession      = Yes
 +
| predecessor      = Haswell
 +
| predecessor link = intel/microarchitectures/haswell
 +
| successor        = Skylake
 +
| successor link  = intel/microarchitectures/skylake
 +
}}
 
'''Broadwell''' is [[Intel]]'s  [[microarchitecture]] based on the [[14 nm process]] for mobile, desktops, and servers. Introduced in early 2015, Broadwell is a [[process shrink]] of {{\\|Haswell}} which introduced several enhancements.
 
'''Broadwell''' is [[Intel]]'s  [[microarchitecture]] based on the [[14 nm process]] for mobile, desktops, and servers. Introduced in early 2015, Broadwell is a [[process shrink]] of {{\\|Haswell}} which introduced several enhancements.
  
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=== Key changes from {{\\|Haswell}} ===
 
=== Key changes from {{\\|Haswell}} ===
 +
* ~5% IPC improvement
 
* FP multiplication instructions has reduced latency (3 cycles, down from 5)
 
* FP multiplication instructions has reduced latency (3 cycles, down from 5)
 
** Affects AVX, SSE, and FP instructions
 
** Affects AVX, SSE, and FP instructions
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* Address prediction for branches and returns was improved
 
* Address prediction for branches and returns was improved
 
* Improved cryptography acceleration instructions
 
* Improved cryptography acceleration instructions
 +
 +
Core features maintained a 2:1 ratio of performance:power.
 +
 +
==== Graphics ====
 +
* 50% higher sampler throughput
 +
* Improvements for increased geometry, Z, Pixel Fill
 +
* Direct X 11.2, OpenGL 4.3
 +
* OpenCL 1.2 and 2.0 (with Shared Virtual Memory)
 +
* Up to 24 EUs (20% addition, up from 20 in {{\\|Haswell}}), 48 EUs on {{intel|Iris Pro Graphics}}

Revision as of 20:45, 12 April 2016

Edit Values
Broadwell µarch
General Info
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Broadwell is Intel's microarchitecture based on the 14 nm process for mobile, desktops, and servers. Introduced in early 2015, Broadwell is a process shrink of Haswell which introduced several enhancements.

Codenames

Core Target
Broadwell Y Core M family, SoC for Smartphones, 2-in-1s Tablets, and notebooks
Broadwell U Core ultrabooks
Broadwell H IoT (QM87, HM86/HM87 Chipsets), All-in-ones
Broadwell DT Unlocked desktop MPUs
Broadwell EP Xeon E5, Dual-Processor platform
Broadwell EX Xeon E5, Multi-Processor platform, QPI
Broadwell E High-End Desktops (HEDT)

Architecture

Broadwell is for the most part identical to Haswell with server enhancements.

Key changes from Haswell

  • ~5% IPC improvement
  • FP multiplication instructions has reduced latency (3 cycles, down from 5)
    • Affects AVX, SSE, and FP instructions
  • CLMUL instructions are now a single μop, improving latency and throughput
  • The second-level TLB (STLB)
    • Table was enlarged (1,536 entries, up from 1024)
    • 1GB page mode (16 entries, 4-ways set associative)
  • Larger out-of-order scheduler
  • Faster store-to-load forwarding
  • Address prediction for branches and returns was improved
  • Improved cryptography acceleration instructions

Core features maintained a 2:1 ratio of performance:power.

Graphics

  • 50% higher sampler throughput
  • Improvements for increased geometry, Z, Pixel Fill
  • Direct X 11.2, OpenGL 4.3
  • OpenCL 1.2 and 2.0 (with Shared Virtual Memory)
  • Up to 24 EUs (20% addition, up from 20 in Haswell), 48 EUs on Iris Pro Graphics
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