Semiconductor & Computer Engineering
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Difference between revisions of "Template:microarchitecture"
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<includeonly>{| style="border: solid 1px #ccffcc; width: 275px; float: right; margin: 0 10px 10px 10px; text-align: left; font-size: 12px;" | <includeonly>{| style="border: solid 1px #ccffcc; width: 275px; float: right; margin: 0 10px 10px 10px; text-align: left; font-size: 12px;" | ||
| − | | style="text-align: center; background: #ccffcc; font-size: 16px;" colspan="2" | '''{{{name|NAME-MISSING}}} µarch''' | + | | style="text-align: center; background: #ccffcc; font-size: 16px;" colspan="2" | [[codename::{{{name|NAME-MISSING}}}| ]]'''[[name::{{{name|NAME-MISSING}}}]] µarch''' |
{{#if:{{{manufacturer|}}}|{{!-}}|<div></div>}} | {{#if:{{{manufacturer|}}}|{{!-}}|<div></div>}} | ||
{{#if:{{{manufacturer|}}}|{{!}} '''Manufacturer''' {{!}}{{!}} [[manufacturer::{{{manufacturer}}}]]|}} | {{#if:{{{manufacturer|}}}|{{!}} '''Manufacturer''' {{!}}{{!}} [[manufacturer::{{{manufacturer}}}]]|}} | ||
| Line 47: | Line 47: | ||
{{#if:{{{predecessor|}}}{{{successor|}}}|{{!-}}|<div></div>}} | {{#if:{{{predecessor|}}}{{{successor|}}}|{{!-}}|<div></div>}} | ||
{{#if:{{{predecessor|}}}{{{successor|}}}|{{!}} {{#if:{{{predecessor|}}}|[[{{{predecessor link|{{{predecessor}}}}}}|{{{predecessor}}}]]}} {{!}}{{!}} {{#if:{{{successor|}}}|style="text-align: right;" {{!}} [[{{{successor link|{{{successor}}}}}}|{{{successor}}}]]}}|}} | {{#if:{{{predecessor|}}}{{{successor|}}}|{{!}} {{#if:{{{predecessor|}}}|[[{{{predecessor link|{{{predecessor}}}}}}|{{{predecessor}}}]]}} {{!}}{{!}} {{#if:{{{successor|}}}|style="text-align: right;" {{!}} [[{{{successor link|{{{successor}}}}}}|{{{successor}}}]]}}|}} | ||
| − | |}[[Category:all microarchitectures]][[Category:microarchitectures by {{{manufacturer}}}]][[full page name::{{FULLPAGENAME}}| ]][[instance of::microarchitecture| ]]</includeonly><noinclude>{{documentation}} | + | |}<!-- |
| + | -->[[Category:all microarchitectures]]<-- | ||
| + | -->[[Category:microarchitectures by {{{manufacturer}}}]]<-- | ||
| + | -->[[full page name::{{FULLPAGENAME}}| ]]<-- | ||
| + | -->[[instance of::microarchitecture| ]]<-- | ||
| + | --></includeonly><noinclude>{{documentation}} | ||
</noinclude> | </noinclude> | ||
Revision as of 13:57, 8 April 2016
Code
{{microarchitecture
| atype = "CPU" or "GPU" (meta-related)
| name =
| designer =
| manufacturer =
| introduction =
| phase-out =
| process =
| cores =
| cores 2 =
| cores N =
| type = <!-- e.g. "Superscalar" -->
| type 2 =
| type N =
| oooe = <!-- Yes or No only -->
| speculative = <!-- Yes or No only -->
| renaming = <!-- Yes or No only -->
| stages = <!-- ONLY IF FIXED SIZE, otherwise use below for range -->
| stages min =
| stages max =
| decode = 2-way
| isa =
| isa 2 =
| isa N =
| feature =
| extension =
| extension 2 =
| extension N =
| l1i =
| l1i per =
| l1i desc =
| l1d =
| l1d per =
| l1d desc =
| l2 =
| l2 per =
| l2 desc =
| l3 =
| l3 per =
| l3 desc =
| core name =
| core name 2 =
| core name N =
| predecessor =
| predecessor link =
| successor =
| successor link =
| successor 2 =
| successor 2 link =
| successor N =
| successor N link =
}}