Semiconductor & Computer Engineering
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Difference between revisions of "Template:microarchitecture"
| Line 2: | Line 2: | ||
| style="text-align: center; background: #ccffcc; font-size: 16px;" colspan="2" | '''{{{name|NAME-MISSING}}} µarch''' | | style="text-align: center; background: #ccffcc; font-size: 16px;" colspan="2" | '''{{{name|NAME-MISSING}}} µarch''' | ||
{{#if:{{{manufacturer|}}}|{{!-}}|<div></div>}} | {{#if:{{{manufacturer|}}}|{{!-}}|<div></div>}} | ||
| − | {{#if:{{{manufacturer|}}}|{{!}} '''Manufacturer''' {{!}}{{!}} {{{manufacturer}}}|}} | + | {{#if:{{{manufacturer|}}}|{{!}} '''Manufacturer''' {{!}}{{!}} [[manufacturer::{{{manufacturer}}}]]|}} |
{{#if:{{{introduction|}}}|{{!-}}|<div></div>}} | {{#if:{{{introduction|}}}|{{!-}}|<div></div>}} | ||
| − | {{#if:{{{introduction|}}}|{{!}} '''Introduction''' {{!}}{{!}} {{{introduction}}}|}} | + | {{#if:{{{introduction|}}}|{{!}} '''Introduction''' {{!}}{{!}} [[first launched::{{{introduction}}}]]|}} |
{{#if:{{{phase-out|}}}|{{!-}}|<div></div>}} | {{#if:{{{phase-out|}}}|{{!-}}|<div></div>}} | ||
{{#if:{{{phase-out|}}}|{{!}} '''Phase-out''' {{!}}{{!}} {{{phase-out}}}|}} | {{#if:{{{phase-out|}}}|{{!}} '''Phase-out''' {{!}}{{!}} {{{phase-out}}}|}} | ||
{{#if:{{{process|}}}|{{!-}}|<div></div>}} | {{#if:{{{process|}}}|{{!-}}|<div></div>}} | ||
| − | {{#if:{{{process|}}}|{{!}} '''Process''' {{!}}{{!}} {{{process}}}|}} | + | {{#if:{{{process|}}}|{{!}} '''Process''' {{!}}{{!}} [[process::{{{process}}}]]|}} |
{{#if:{{{cores min|}}}|{{!-}}|<div></div>}} | {{#if:{{{cores min|}}}|{{!-}}|<div></div>}} | ||
{{#if:{{{cores min|}}}|{{!}} '''Cores''' {{!}}{{!}} {{{cores min}}}{{#if:{{{cores max|}}}|-{{{cores max}}}}}|}} | {{#if:{{{cores min|}}}|{{!}} '''Cores''' {{!}}{{!}} {{{cores min}}}{{#if:{{{cores max|}}}|-{{{cores max}}}}}|}} | ||
Revision as of 21:26, 7 April 2016
Code
{{microarchitecture
| atype = "CPU" or "GPU" (meta-related)
| name =
| designer =
| manufacturer =
| introduction =
| phase-out =
| process =
| cores =
| cores 2 =
| cores N =
| type = <!-- e.g. "Superscalar" -->
| type 2 =
| type N =
| oooe = <!-- Yes or No only -->
| speculative = <!-- Yes or No only -->
| renaming = <!-- Yes or No only -->
| stages = <!-- ONLY IF FIXED SIZE, otherwise use below for range -->
| stages min =
| stages max =
| decode = 2-way
| isa =
| isa 2 =
| isa N =
| feature =
| extension =
| extension 2 =
| extension N =
| l1i =
| l1i per =
| l1i desc =
| l1d =
| l1d per =
| l1d desc =
| l2 =
| l2 per =
| l2 desc =
| l3 =
| l3 per =
| l3 desc =
| core name =
| core name 2 =
| core name N =
| predecessor =
| predecessor link =
| successor =
| successor link =
| successor 2 =
| successor 2 link =
| successor N =
| successor N link =
}}