From WikiChip
Difference between revisions of "Template:microarchitecture"
Line 42: | Line 42: | ||
{{#if:{{{predecessor|}}}{{{successor|}}}|{{!}} {{#if:{{{predecessor|}}}|'''←'''}} {{!}}{{!}} {{#if:{{{successor|}}}|style="text-align: right;" {{!}} '''→'''}}|}} | {{#if:{{{predecessor|}}}{{{successor|}}}|{{!}} {{#if:{{{predecessor|}}}|'''←'''}} {{!}}{{!}} {{#if:{{{successor|}}}|style="text-align: right;" {{!}} '''→'''}}|}} | ||
{{#if:{{{predecessor|}}}{{{successor|}}}|{{!-}}|<div></div>}} | {{#if:{{{predecessor|}}}{{{successor|}}}|{{!-}}|<div></div>}} | ||
− | {{#if:{{{predecessor|}}}{{{successor|}}}|{{!}} {{#if:{{{predecessor|}}}|{{{predecessor}}}}} {{!}}{{!}} {{#if:{{{successor|}}}|style="text-align: right;" {{!}} {{{successor}}}}}|}} | + | {{#if:{{{predecessor|}}}{{{successor|}}}|{{!}} {{#if:{{{predecessor|}}}|[[{{{predecessor link|{{{predecessor}}}}}}|{{{predecessor}}}]]}} {{!}}{{!}} {{#if:{{{successor|}}}|style="text-align: right;" {{!}} [[{{{successor link|{{{successor}}}}}}|{{{successor}}}]]}}|}} |
|}[[Category:all microarchitectures]][[Category:microarchitectures by {{{manufacturer}}}]][[full page name::{{FULLPAGENAME}}| ]][[instance of::microarchitecture| ]]</includeonly><noinclude>{{documentation}} | |}[[Category:all microarchitectures]][[Category:microarchitectures by {{{manufacturer}}}]][[full page name::{{FULLPAGENAME}}| ]][[instance of::microarchitecture| ]]</includeonly><noinclude>{{documentation}} | ||
</noinclude> | </noinclude> |
Revision as of 20:30, 7 April 2016
Code
{{microarchitecture | atype = "CPU" or "GPU" (meta-related) | name = | designer = | manufacturer = | introduction = | phase-out = | process = | cores = | cores 2 = | cores N = | type = <!-- e.g. "Superscalar" --> | type 2 = | type N = | oooe = <!-- Yes or No only --> | speculative = <!-- Yes or No only --> | renaming = <!-- Yes or No only --> | stages = <!-- ONLY IF FIXED SIZE, otherwise use below for range --> | stages min = | stages max = | decode = 2-way | isa = | isa 2 = | isa N = | feature = | extension = | extension 2 = | extension N = | l1i = | l1i per = | l1i desc = | l1d = | l1d per = | l1d desc = | l2 = | l2 per = | l2 desc = | l3 = | l3 per = | l3 desc = | core name = | core name 2 = | core name N = | predecessor = | predecessor link = | successor = | successor link = | successor 2 = | successor 2 link = | successor N = | successor N link = }}