Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "fairchild/f9450"
(typo) |
(→Overview) |
||
| Line 15: | Line 15: | ||
== Overview == | == Overview == | ||
| − | The Fairchild F9450 was one of the first chips to implement the [[MIL-STD-1750A]] specification. The chip features real-time processing abilities, two programmable timers, interrupt and fault handler support. The chip has built-in support for both single and extended (32 and 48-bit) floating point operations without the need for a co-processor extension as specified by the standard. | + | The Fairchild F9450 was one of the first chips to implement the [[MIL-STD-1750A]] specification. The chip features real-time processing abilities, two programmable timers, interrupt and fault handler support. The chip has built-in support for both single and extended (32 and 48-bit) floating point operations without the need for a co-processor extension as specified by the standard - unlike many other chips which implement the MIL-STD-1750A standard. |
== Support chips == | == Support chips == | ||
Revision as of 18:39, 30 January 2014
| ||||||||||||||||||||||||
.svg)
The Fairchild F9450 is a high-performance 16-bit bipolar microprocessor developed by Fairchild in 1985. The F9450, which implements the MIL-STD-1750A standard, was designed for both commercial and military applications.
Overview
The Fairchild F9450 was one of the first chips to implement the MIL-STD-1750A specification. The chip features real-time processing abilities, two programmable timers, interrupt and fault handler support. The chip has built-in support for both single and extended (32 and 48-bit) floating point operations without the need for a co-processor extension as specified by the standard - unlike many other chips which implement the MIL-STD-1750A standard.
Support chips
| Model | Description |
|---|---|
| F9451 | Memory Management Unit |
| F9451 | Block Protection Unit |
| F9452 | Block Protection Unit |