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Revision as of 00:29, 31 December 2013

Buffer Gate
A Q
0 0
1 1

A buffer, is a basic logic gate that passes its input, unchanged, to its output. It's behavior is the opposite of a NOT gate. The main purpose of a buffer is to simply amplify a weak signal. Equation upper Q equals upper A

A buffer has one input and one output. The output of a buffer always equals its input.

Standard symbol

Below are the three standard symbols that represent the OR gate:

ANSI IEC DIN
Buffer gate ansi.svg Buffer gate iec.svg Buffer gate din.svg

CMOS Implementation

A CMOS buffer gate with one input and one output can be realized as simply two inverters back to back - built out of just 4 gates.

The table on the right shows the states of the four transistors with the various inputs of A.

Buffer Gate by Transistor
A Q1 Q2 Q3 Q4 Q
0 1 0 0 1 0
1 0 1 1 0 1

Buffer gate cmos.png

7407: Hex Buffer/Driver

7407.svg

The 7407 is a TTL chip with 14 pins. Two pins are used for VDD and GND, the other 12 pins are used for the 6 independent buffers. The 7407 chip implements the following expressions:

  • Equation upper Q Baseline 1 equals upper A Baseline 1
  • Equation upper Q Baseline 2 equals upper A Baseline 2
  • Equation upper Q Baseline 3 equals upper A Baseline 3
  • Equation upper Q Baseline 4 equals upper A Baseline 4
  • Equation upper Q Baseline 5 equals upper A Baseline 5
  • Equation upper Q Baseline 6 equals upper A Baseline 6

4050 cmos Hex Buffer/Driver

4050.svg

The 4050 is a CMOS Hex Buffer with 16 pins. Two pins are used for VDD and GND, 12 pins are used for the 6 independent buffers. Pins 13 and 16 are not connected.

  • Equation upper Q Baseline 1 equals upper A Baseline 1
  • Equation upper Q Baseline 2 equals upper A Baseline 2
  • Equation upper Q Baseline 3 equals upper A Baseline 3
  • Equation upper Q Baseline 4 equals upper A Baseline 4
  • Equation upper Q Baseline 5 equals upper A Baseline 5
  • Equation upper Q Baseline 6 equals upper A Baseline 6