Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "apple/mx"
(Add M2 variations) |
(→Members) |
||
| Line 37: | Line 37: | ||
== Members == | == Members == | ||
{{collist | {{collist | ||
| − | | count = | + | | count = 4 |
| | | | ||
* {{\|M1}} | * {{\|M1}} | ||
| Line 43: | Line 43: | ||
* {{\|M1 Max}} | * {{\|M1 Max}} | ||
* {{\|M1 Ultra}} | * {{\|M1 Ultra}} | ||
| + | |||
* {{\|M2}} | * {{\|M2}} | ||
* {{\|M2 Pro}} | * {{\|M2 Pro}} | ||
* {{\|M2 Max}} | * {{\|M2 Max}} | ||
* {{\|M2 Ultra}} | * {{\|M2 Ultra}} | ||
| + | |||
| + | * {{\|M3}} | ||
| + | * {{\|M3 Pro}} | ||
| + | * {{\|M3 Max}} | ||
| + | |||
| + | * {{\|M4}} | ||
| + | * {{\|M4 Pro}} | ||
| + | * {{\|M4 Max}} | ||
}} | }} | ||
Latest revision as of 10:21, 10 February 2025
| Apple Mx | |
| |
| Apple M Family | |
| Developer | Apple, ARM Holdings |
| Manufacturer | TSMC |
| Type | System on Chips |
| Introduction | November 10, 2020 (announced) November 17, 2020 (launch) |
| Architecture | High-performance ARM SoCs |
| ISA | ARM |
| Word size | 64 bit 8 octets
16 nibbles |
| Process | 5 nm 0.005 μm
5.0e-6 mm |
| Technology | CMOS |
| Clock | TBD-TBD |
Mx is a family of high-performance 64-bit ARM system on chips designed by Apple exclusively for their consumer products.
Overview[edit]
A to-be series of chips designed by Apple for their Macintosh line of computers. The Mx family is closely related to and derived from the Ax family, beginning with the A14.
Members[edit]
See also[edit]
- AMD Zen 3
- Intel Core Family
- Qualcomm Snapdragon
Facts about "Mx - Apple"
| designer | Apple + and ARM Holdings + |
| first announced | November 10, 2020 + |
| first launched | November 17, 2020 + |
| full page name | apple/mx + |
| instance of | system on a chip family + |
| instruction set architecture | ARM + |
| main designer | Apple + |
| manufacturer | TSMC + |
| name | Apple Mx + |
| process | 5 nm (0.005 μm, 5.0e-6 mm) + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |