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Difference between revisions of "intel/microarchitectures/meteor lake"
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|designer=Intel | |designer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
| − | |introduction=2022 | + | |manufacturer 2=TSMC (?) |
| + | |introduction=2022 / 2023 | ||
|process=7 nm | |process=7 nm | ||
| + | |process 2=3 nm from TSMC (?) | ||
|isa=x86-64 | |isa=x86-64 | ||
| + | |core name=Redwood Cove | ||
| + | |core name 2=Gracemont | ||
|predecessor=Alder Lake | |predecessor=Alder Lake | ||
|predecessor link=intel/microarchitectures/alder lake | |predecessor link=intel/microarchitectures/alder lake | ||
Revision as of 06:14, 3 February 2021
| Edit Values | |
| Meteor Lake µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel, TSMC (?) |
| Introduction | 2022 / 2023 |
| Process | 7 nm, 3 nm from TSMC (?) |
| Instructions | |
| ISA | x86-64 |
| Cores | |
| Core Names | Redwood Cove, Gracemont |
| Succession | |
Meteor Lake (MTL) is Intel's successor to Alder Lake, a 7 nm microarchitecture for mainstream workstations, desktops, and mobile devices.
Facts about "Meteor Lake - Microarchitectures - Intel"
| codename | Meteor Lake + |
| designer | Intel + |
| full page name | intel/microarchitectures/meteor lake + |
| instance of | microarchitecture + |
| instruction set architecture | x86-64 + |
| manufacturer | Intel + and TSMC (?) + |
| microarchitecture type | CPU + |
| name | Meteor Lake + |
| process | 7 nm (0.007 μm, 7.0e-6 mm) + |