Semiconductor & Computer Engineering
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Difference between revisions of "marvell/thunderx3"
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Revision as of 03:06, 28 July 2019
| ThunderX3 | |
| ThunderX3 | |
| Developer | Marvell |
| Manufacturer | TSMC |
| Type | Microprocessors |
| Introduction | 2019 (announced) |
| ISA | ARMv8.2 |
| µarch | Triton |
| Word size | 64 bit 8 octets
16 nibbles |
| Technology | CMOS, 7nm FFN TSMC "7nm FFN TSMC" is not in the list (BiCMOS, CMOS, Static CMOS, Dynamic CMOS, nMOS, pMOS, Bipolar, ECL, Schottky TTL, Schottky transistor, ...) of allowed values for the "technology" property.
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| Succession | |
| ← | |
| ThunderX2 | |
ThunderX3 is a family of 64-bit multi-core ARM server microprocessors planned by Marvell, succeeding the ThunderX2 line originally released by Cavium, now acquired by Marvell.
Overview
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This section is empty; you can help add the missing info by editing this page. |
Facts about "ThunderX3 - Marvell"
| designer | Marvell + |
| first announced | 2019 + |
| full page name | marvell/thunderx3 + |
| instance of | microprocessor family + |
| instruction set architecture | ARMv8.2 + |
| main designer | Marvell + |
| manufacturer | TSMC + |
| microarchitecture | Triton + |
| name | ThunderX3 + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |