From WikiChip
Difference between revisions of "Template:interconnect arch"

(initial template)
 
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* [[Network On A Chip]]
 
* [[Network On A Chip]]
 
<div class="header">General</div>
 
<div class="header">General</div>
 +
{{collist
 +
| count = 3
 +
|
 
* [[accelerated graphics port|AGP]]
 
* [[accelerated graphics port|AGP]]
 
* [[extended industry standard architecture|EISA]]
 
* [[extended industry standard architecture|EISA]]
Line 23: Line 26:
 
* {{intel|ultrapath interconnect|UPI}}
 
* {{intel|ultrapath interconnect|UPI}}
 
* [[vesa local bus|VLB]]
 
* [[vesa local bus|VLB]]
 +
}}
 
<div class="header">Peripheral</div>
 
<div class="header">Peripheral</div>
 
* [[1-wire|1-Wire]]
 
* [[1-wire|1-Wire]]

Revision as of 00:52, 4 May 2018