|
|
| Line 1: |
Line 1: |
| − | {{title|Intel}}
| + | brian krzanich groped lisa su!!!!!!!!!!!!!!!!!!!!!!! |
| − | {{semi company
| |
| − | | name = Intel
| |
| − | | logo = Intel-logo.svg
| |
| − | | type = Public
| |
| − | | founded = July 18, 1968
| |
| − | | founded location = Mountain View, California
| |
| − | | founder = Gordon Moore
| |
| − | | founder 2 = Robert Noyce
| |
| − | | founder 3 = Andrew Grove
| |
| − | | headquarters = Santa Clara, California
| |
| − | | website = http://www.intel.com
| |
| − | | wikidata id = Q248
| |
| − | | module 1 = {{manufacturer id
| |
| − | | logo1 = [[File:ic logo (intel).svg]]
| |
| − | | package1 = [[File:ic example (intel).svg]]
| |
| − | }}
| |
| − | }}
| |
| − | '''Intel Corporation''' is an American [[semiconductor]] company. While most notably known for their development of [[microprocessors]] and [[x86]], Intel also designs and manufactures other [[integrated circuit]]s including [[flash memory]], [[network interface controller]]s, [[GPU]]s, [[chipset]]s, motherboards, and computers.
| |
| − | | |
| − | In addition to [[x86]], Intel used to also design and manufacture [[ARM]]-based chips as well as embed [[ARC]]-based cores in their products. While they no longer sell such chips, they still use ARM processors in various products (e.g. in their FPGAs) as well as still retain full a architectural level ARM license allowing them to design and sell their own ARM devices should they wish to.
| |
| − | | |
| − | == Find Chip ==
| |
| − | * By {{intel|S-Spec}}
| |
| − | | |
| − | == List of processor families ==
| |
| − | {{collist
| |
| − | | count = 4
| |
| − | |
| |
| − | * {{intel|3000}}
| |
| − | * {{intel|80186}}
| |
| − | * {{intel|80188}}
| |
| − | * {{intel|80286}}
| |
| − | * {{intel|80376}}
| |
| − | * {{intel|80386}}
| |
| − | * {{intel|80486}}
| |
| − | * {{intel|Atom}}
| |
| − | * {{intel|Atom x3}}
| |
| − | * {{intel|Atom x5}}
| |
| − | * {{intel|Atom x7}}
| |
| − | * {{intel|Celeron}}
| |
| − | * {{intel|Celeron D}}
| |
| − | * {{intel|Celeron M}}
| |
| − | * {{intel|Core 2 Duo}}
| |
| − | * {{intel|Core 2 Extreme}}
| |
| − | * {{intel|Core 2 Quad}}
| |
| − | * {{intel|Core 2 Quad Extreme}}
| |
| − | * {{intel|Core 2 Solo}}
| |
| − | * {{intel|Core Duo}}
| |
| − | * {{intel|Core i3}}
| |
| − | * {{intel|Core i5}}
| |
| − | * {{intel|Core i7}}
| |
| − | * {{intel|Core i7 EE}}
| |
| − | * {{intel|Core i9}}
| |
| − | * {{intel|Core M}}
| |
| − | * {{intel|Core Solo}}
| |
| − | * {{intel|EP80579}}
| |
| − | * {{intel|i860}}
| |
| − | * {{intel|i960}}
| |
| − | * {{intel|iAPX432}}
| |
| − | * {{intel|Itanium}}
| |
| − | * {{intel|Itanium 2}}
| |
| − | * {{intel|MCS-4}}
| |
| − | * {{intel|MCS-40}}
| |
| − | * {{intel|MCS-48}}
| |
| − | * {{intel|MCS-51}}
| |
| − | * {{intel|MCS-8}}
| |
| − | * {{intel|MCS-80}}
| |
| − | * {{intel|MCS-85}}
| |
| − | * {{intel|MCS-86}}
| |
| − | * {{intel|MCS-88}}
| |
| − | * {{intel|MCS-96}}
| |
| − | * {{intel|Mobile Pentium II}}
| |
| − | * {{intel|Pentium}}
| |
| − | * {{intel|Pentium (2009)}}
| |
| − | * {{intel|Pentium 4}}
| |
| − | * {{intel|Pentium 4 EE}}
| |
| − | * {{intel|Pentium 4-M}}
| |
| − | * {{intel|Pentium D}}
| |
| − | * {{intel|Pentium EE}}
| |
| − | * {{intel|Pentium Gold}}
| |
| − | * {{intel|Pentium II}}
| |
| − | * {{intel|Pentium III}}
| |
| − | * {{intel|Pentium III Mobile}}
| |
| − | * {{intel|Pentium III Xeon}}
| |
| − | * {{intel|Pentium II Mobile}}
| |
| − | * {{intel|Pentium II Xeon}}
| |
| − | * {{intel|Pentium M}}
| |
| − | * {{intel|Pentium MMX}}
| |
| − | * {{intel|Pentium Pro}}
| |
| − | * {{intel|Pentium Silver}}
| |
| − | * {{intel|PXA}}
| |
| − | * {{intel|Quark}}
| |
| − | * {{intel|Xeon}}
| |
| − | * {{intel|Xeon Bronze}}
| |
| − | * {{intel|Xeon D}}
| |
| − | * {{intel|Xeon E3}}
| |
| − | * {{intel|Xeon E5}}
| |
| − | * {{intel|Xeon E7}}
| |
| − | * {{intel|Xeon Gold}}
| |
| − | * {{intel|Xeon Platinum}}
| |
| − | * {{intel|Xeon Silver}}
| |
| − | * {{intel|Xeon W}}
| |
| − | }}
| |
| − | | |
| − | == List of instruction set architectures ==
| |
| − | {{collist
| |
| − | | count = 1
| |
| − | |
| |
| − | * {{intel|MCS-8/ISA|MCS-8 (8008)}}
| |
| − | }}
| |
| − | | |
| − | == List of microarchitectures ==
| |
| − | '''Mainstream ([[x86]]):'''
| |
| − | {{collist
| |
| − | | count = 4
| |
| − | |
| |
| − | * {{intel|80186|l=arch}}
| |
| − | * {{intel|80286|l=arch}}
| |
| − | * {{intel|80386|l=arch}}
| |
| − | * {{intel|80486|l=arch}}
| |
| − | * {{intel|P5|l=arch}}
| |
| − | * {{intel|P6|l=arch}}
| |
| − | * {{intel|NetBurst|l=arch}}
| |
| − | * {{intel|Enhanced NetBurst|l=arch}}
| |
| − | * {{intel|Core|l=arch}}
| |
| − | * {{intel|Penryn|l=arch}}
| |
| − | * {{intel|Nehalem|l=arch}}
| |
| − | * {{intel|Westmere|l=arch}}
| |
| − | * {{intel|Sandy Bridge|l=arch}}
| |
| − | * {{intel|Ivy Bridge|l=arch}}
| |
| − | * {{intel|Haswell|l=arch}}
| |
| − | * {{intel|Broadwell|l=arch}}
| |
| − | * Skylake ({{intel|Skylake|client}}, {{intel|Skylake (server)|server}})
| |
| − | * {{intel|Kaby Lake|l=arch}}
| |
| − | * {{intel|Coffee Lake|l=arch}}
| |
| − | * {{intel|Cascade Lake|l=arch}}
| |
| − | * {{intel|Cannonlake|l=arch}} ("Skymont")
| |
| − | * {{intel|Icelake|l=arch}}
| |
| − | * {{intel|Tigerlake|l=arch}}
| |
| − | * {{intel|Sapphire Rapids|l=arch}}
| |
| − | * {{intel|Anderson Lake|l=arch}}
| |
| − | }}
| |
| − | '''ULP ([[x86]]):'''
| |
| − | {{collist
| |
| − | | count = 2
| |
| − | |
| |
| − | * {{intel|Bonnell|l=arch}}
| |
| − | * {{intel|Saltwell|l=arch}}
| |
| − | * {{intel|Silvermont|l=arch}}
| |
| − | * {{intel|Airmont|l=arch}}
| |
| − | * {{intel|Goldmont|l=arch}}
| |
| − | * {{intel|Goldmont Plus|l=arch}}
| |
| − | }}
| |
| − | '''ULP ([[ARM]]):'''
| |
| − | {{collist
| |
| − | | count = 3
| |
| − | |
| |
| − | * {{intel|XScale|l=arch}}
| |
| − | * {{intel|XScale 2|l=arch}}
| |
| − | * {{intel|XScale 3|l=arch}}
| |
| − | * {{intel|Mohawk|l=arch}}
| |
| − | * Continued by [[Marvell]] ..
| |
| − | }}
| |
| − | '''Server (EPIC) ([[Itanium]]):'''
| |
| − | {{collist
| |
| − | | count = 4
| |
| − | |
| |
| − | * {{intel|Merced|l=arch}}
| |
| − | * {{intel|McKinley|l=arch}}
| |
| − | * {{intel|Madison|l=arch}}
| |
| − | * {{intel|Deerfield|l=arch}}
| |
| − | * {{intel|Hondo|l=arch}}
| |
| − | * {{intel|Madison 9M|l=arch}}
| |
| − | * {{intel|Fanwood|l=arch}}
| |
| − | * {{intel|Montecito|l=arch}}
| |
| − | * {{intel|Chivano|l=arch}}
| |
| − | * {{intel|Millington|l=arch}}
| |
| − | * {{intel|Montvale|l=arch}}
| |
| − | * {{intel|Tukwila|l=arch}}
| |
| − | * {{intel|Dimona|l=arch}}
| |
| − | * {{intel|Poulson|l=arch}}
| |
| − | * {{intel|Kittson|l=arch}}
| |
| − | }}
| |
| − | '''{{intel|MIC Architectures}}:'''
| |
| − | {{collist
| |
| − | | count = 3
| |
| − | |
| |
| − | * {{intel|Larrabee|l=arch}}
| |
| − | * {{intel|Knights Ferry|l=arch}}
| |
| − | * {{intel|Knights Corner|l=arch}}
| |
| − | * {{intel|Knights Landing|l=arch}}
| |
| − | * {{intel|Knights Hill|l=arch}}
| |
| − | * {{intel|Knights Mill|l=arch}}
| |
| − | }}
| |
| − | '''GPU:'''
| |
| − | {{collist
| |
| − | | count = 3
| |
| − | | width = 500px
| |
| − | |
| |
| − | * {{intel|Gen1|l=arch}}
| |
| − | * {{intel|Gen2|l=arch}}
| |
| − | * {{intel|Gen3|l=arch}}
| |
| − | * {{intel|Gen3.5|l=arch}}
| |
| − | * {{intel|Gen4|l=arch}}
| |
| − | * {{intel|Gen5|l=arch}}
| |
| − | * {{intel|Gen5.75|l=arch}} ("Ironlake")
| |
| − | * {{intel|Gen6|l=arch}}
| |
| − | * {{intel|Gen7|l=arch}}
| |
| − | * {{intel|Gen7.5|l=arch}}
| |
| − | * {{intel|Gen8|l=arch}}
| |
| − | * {{intel|Gen9|l=arch}}
| |
| − | * {{intel|Gen9.5|l=arch}}
| |
| − | * {{intel|Gen10|l=arch}}
| |
| − | * {{intel|Gen11|l=arch}}
| |
| − | }}
| |
| − | | |
| − | == Other Chips ==
| |
| − | '''Neuromorphic:'''
| |
| − | {{collist
| |
| − | | count = 1
| |
| − | |
| |
| − | * {{intel|Loihi}}
| |
| − | }}
| |
| − | '''Quantum:'''
| |
| − | {{collist
| |
| − | | count = 1
| |
| − | |
| |
| − | * {{intel|Surface-17}}
| |
| − | }}
| |
| − | '''RAM:'''
| |
| − | {{collist
| |
| − | | count = 1
| |
| − | |
| |
| − | * {{intel|3101}}
| |
| − | * {{intel|1103}}
| |
| − | }}
| |
| − | | |
| − | == Other ==
| |
| − | {{collist
| |
| − | | count = 2
| |
| − | | width = 200px
| |
| − | |
| |
| − | * {{intel|iAPX}}
| |
| − | * {{intel|iRMX}}
| |
| − | * {{intel|iSBC}}
| |
| − | * {{intel|iSBX}}
| |
| − | }}
| |
| − | | |
| − | == Other topics ==
| |
| − | {{collist
| |
| − | | count = 2
| |
| − | |
| |
| − | * {{intel|Tick-Tock}}
| |
| − | * {{intel|Process-Architecture-Optimization}} (PAO)
| |
| − | * {{intel|Turbo Boost Technology}} (TBT)
| |
| − | * {{intel|Process Technology}}
| |
| − | * {{intel|frequency behavior}}
| |
| − | }}
| |
| − | | |
| − | == Documents ==
| |
| − | * [[:File:1975 Intel Data Catalog.pdf|Intel Data Catalog]], 1975
| |
| − | | |
| − | [[Category:intel]]
| |
