Semiconductor & Computer Engineering
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Difference between revisions of "page table entry"
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{{title|Page Table Entry (PTE)}} | {{title|Page Table Entry (PTE)}} | ||
| − | A '''page table entry''' ('''PTE''') refers to a single mapping entry in a [[page table]] | + | A '''page table entry''' ('''PTE''') refers to a single mapping entry in a [[page table]] used to page a [[virtual address]] into a [[physical address]]. A PTE usually consists of a [[page frame number]] (PFN) and various [[control bits]] such as [[valid bit]] and protection bits (e.g. read-only or execute). |
{{stub}} | {{stub}} | ||
Latest revision as of 00:22, 6 November 2017
A page table entry (PTE) refers to a single mapping entry in a page table used to page a virtual address into a physical address. A PTE usually consists of a page frame number (PFN) and various control bits such as valid bit and protection bits (e.g. read-only or execute).
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