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Difference between revisions of "intel/celeron/b820"
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== Expansions == | == Expansions == | ||
+ | {{expansions main | ||
+ | | | ||
+ | {{expansions entry | ||
+ | |type=PCIe | ||
+ | |pcie revision=2.0 | ||
+ | |pcie lanes=16 | ||
+ | |pcie config=1x16 | ||
+ | |pcie config 2=2x8 | ||
+ | |pcie config 3=1x8+2x4 | ||
+ | }} | ||
+ | }} | ||
== Graphics == | == Graphics == |
Revision as of 19:50, 19 August 2017
Cache
Memory controller
Integrated Memory Controller
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Expansions
Expansion Options |
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Graphics
Features
[Edit/Modify Supported Features]
Supported x86 Extensions & Processor Features
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Facts about "Celeron B820 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Celeron B820 - Intel#pcie + |
has ecc memory support | false + |
max memory bandwidth | 19.87 GiB/s (20,346.88 MiB/s, 21.335 GB/s, 21,335.25 MB/s, 0.0194 TiB/s, 0.0213 TB/s) + |
max memory channels | 2 + |
supported memory type | DDR3-1333 + and DDR3-1066 + |