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Difference between revisions of "intel/atom/c3308"
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− | '''Atom C3308''' is a {{arch|64}} [[dual-core]] ultra-low power [[x86]] microserver [[system on a chip]] introduced by [[Intel]] in 2017. The C3308, which is manufactured on a [[14 nm process]], is based on the {{intel|Goldmont|l=arch}} microarchitecture. This chip operates at 1.6 GHz with a [[TDP]] of 9.5 W and a {{intel|turbo boost}} frequency of up to 2.1 GHz. The C3308 supports up to a single channel of 128 GiB of DDR4-1866 ECC memory. | + | '''Atom C3308''' is a {{arch|64}} [[dual-core]] ultra-low power [[x86]] microserver [[system on a chip]] introduced by [[Intel]] in 2017. The C3308, which is manufactured on a [[14 nm process]], is based on the {{intel|Goldmont|l=arch}} microarchitecture. This chip operates at 1.6 GHz with a [[TDP]] of 9.5 W and a {{intel|turbo boost}} frequency of up to 2.1 GHz. The C3308 supports up to a single channel of 128 GiB of DDR4-1866 ECC memory. This model is part of {{intel|Denverton|l=core}}'s [[part of::Internet of Things and eTEMP SKUs]] which come with integrated {{intel|QuickAssist Technology}} and support extended ambient operating temperature (-40 °C to 85 °C). |
== Cache == | == Cache == |
Revision as of 07:25, 16 August 2017
Template:mpu Atom C3308 is a 64-bit dual-core ultra-low power x86 microserver system on a chip introduced by Intel in 2017. The C3308, which is manufactured on a 14 nm process, is based on the Goldmont microarchitecture. This chip operates at 1.6 GHz with a TDP of 9.5 W and a turbo boost frequency of up to 2.1 GHz. The C3308 supports up to a single channel of 128 GiB of DDR4-1866 ECC memory. This model is part of Denverton's Internet of Things and eTEMP SKUs which come with integrated QuickAssist Technology and support extended ambient operating temperature (-40 °C to 85 °C).
Cache
- Main article: Goldmont § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Facts about "Atom C3308 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Atom C3308 - Intel#package + and Atom C3308 - Intel#pcie + |
base frequency | 1,600 MHz (1.6 GHz, 1,600,000 kHz) + |
clock multiplier | 16 + |
core count | 2 + |
core family | 6 + |
core model | 95 + |
core name | Denverton + |
core stepping | B1 + |
designer | Intel + |
family | Atom + |
first announced | August 15, 2017 + |
first launched | August 15, 2017 + |
full page name | intel/atom/c3308 + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Turbo Boost Technology 2.0 +, Integrated QuickAssist Technology +, Extended Page Tables + and Memory Protection Extensions + |
has integrated intel quickassist technology | true + |
has intel enhanced speedstep technology | true + |
has intel turbo boost technology 2 0 | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 112 KiB (114,688 B, 0.109 MiB) + |
l1d$ description | 6-way set associative + |
l1d$ size | 48 KiB (49,152 B, 0.0469 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |
ldate | August 15, 2017 + |
main image | ![]() |
manufacturer | Intel + |
market segment | Server + and Embedded + |
max ambient temperature | 358.15 K (85 °C, 185 °F, 644.67 °R) + |
max case temperature | 362.15 K (89 °C, 192.2 °F, 651.87 °R) + |
max cpu count | 1 + |
max hsio lanes | 6 + |
max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
max memory | 131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) + |
max memory bandwidth | 13.91 GiB/s (14,243.84 MiB/s, 14.936 GB/s, 14,935.749 MB/s, 0.0136 TiB/s, 0.0149 TB/s) + |
max memory channels | 1 + |
max sata ports | 6 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
max usb ports | 8 + |
microarchitecture | Goldmont + |
min ambient temperature | 233.15 K (-40 °C, -40 °F, 419.67 °R) + |
min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | C3308 + |
name | Atom C3308 + |
package | FCBGA-1310 + |
part number | HW8076502639802 + |
part of | Internet of Things and eTEMP SKUs + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 32.00 (€ 28.80, £ 25.92, ¥ 3,306.56) + |
s-spec | SR38D + |
series | 3000 + |
smp max ways | 1 + |
supported memory type | DDR3L-1600 + and DDR4-1866 + |
tdp | 9.5 W (9,500 mW, 0.0127 hp, 0.0095 kW) + |
technology | CMOS + |
thread count | 2 + |
turbo frequency (1 core) | 2,100 MHz (2.1 GHz, 2,100,000 kHz) + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has memory protection extensions | true + |