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Difference between revisions of "renesas/r-car/m1s"
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+ | |name=R-Car M1S | ||
+ | |no image=Yes | ||
+ | |designer=Renesas | ||
+ | |designer 2=ARM Holdings | ||
+ | |manufacturer=TSMC | ||
+ | |model number=M1S | ||
+ | |part number=R8A77780 | ||
+ | |market=Embedded | ||
+ | |first announced=February 16, 2011 | ||
+ | |first launched=June, 2012 | ||
+ | |release price=$70 | ||
+ | |family=R-Car | ||
+ | |series=1st Gen | ||
+ | |frequency=800 MHz | ||
+ | |isa=ARMv7 | ||
+ | |isa family=ARM | ||
+ | |isa 2=SuperH | ||
+ | |isa 2 family=SuperH | ||
+ | |microarch=SH-4A | ||
+ | |core name=SH-4A | ||
+ | |process=40 nm | ||
+ | |technology=CMOS | ||
+ | |word size=32 bit | ||
+ | |core count=1 | ||
+ | |thread count=1 | ||
+ | |max memory=1 GiB | ||
+ | |v core=1.2 V | ||
+ | |v io=3.3 V | ||
+ | |package module 1={{packages/renesas/fcbga-472}} | ||
+ | }} | ||
'''R-Car M1S''' is a mid-range performance embedded [[single-core]] SoC for the automotive industry designed by [[Renesas]] and introduced in 2011. The M1S features a single {{renesas|SH-4A|l=arch}} core operating at 800 MHz. This SoC supports up to 1 GiB of DDR3-1066 memory. | '''R-Car M1S''' is a mid-range performance embedded [[single-core]] SoC for the automotive industry designed by [[Renesas]] and introduced in 2011. The M1S features a single {{renesas|SH-4A|l=arch}} core operating at 800 MHz. This SoC supports up to 1 GiB of DDR3-1066 memory. |
Revision as of 09:58, 21 July 2017
Template:mpu R-Car M1S is a mid-range performance embedded single-core SoC for the automotive industry designed by Renesas and introduced in 2011. The M1S features a single SH-4A core operating at 800 MHz. This SoC supports up to 1 GiB of DDR3-1066 memory.
Facts about "R-Car M1S - Renesas"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | R-Car M1S - Renesas#package + |
base frequency | 800 MHz (0.8 GHz, 800,000 kHz) + |
core count | 1 + |
core name | SH-4A + |
core voltage | 1.2 V (12 dV, 120 cV, 1,200 mV) + |
designer | Renesas + |
family | R-Car + |
first announced | February 16, 2011 + |
first launched | June 2012 + |
full page name | renesas/r-car/m1s + |
has ecc memory support | false + |
instance of | microprocessor + |
integrated gpu | PowerVR SGX540 + |
integrated gpu base frequency | 200 MHz (0.2 GHz, 200,000 KHz) + |
integrated gpu designer | Imagination Technologies + |
integrated gpu execution units | 2 + |
io voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
isa | SuperH + |
isa family | SuperH + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 4-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 4-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
ldate | June 2012 + |
manufacturer | TSMC + |
market segment | Embedded + |
max memory | 1,024 MiB (1,048,576 KiB, 1,073,741,824 B, 1 GiB, 9.765625e-4 TiB) + |
max memory bandwidth | 3.97 GiB/s (4,065.28 MiB/s, 4.263 GB/s, 4,262.755 MB/s, 0.00388 TiB/s, 0.00426 TB/s) + |
max memory channels | 1 + |
microarchitecture | SH-4A + |
model number | M1S + |
name | R-Car M1S + |
package | FCBGA-472 + |
part number | R8A77780 + |
process | 40 nm (0.04 μm, 4.0e-5 mm) + |
release price | $ 65.00 (€ 58.50, £ 52.65, ¥ 6,716.45) + |
series | 1st Gen + |
supported memory type | DDR2-800 + and DDR3-1066 + |
technology | CMOS + |
thread count | 1 + |
word size | 32 bit (4 octets, 8 nibbles) + |