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Difference between revisions of "renesas/r-car/m1s"
< renesas‎ | r-car

(Created page with "{{renesas title|R-Car M1S}} {{mpu}} '''R-Car M1S''' is a mid-range performance embedded single-core SoC for the automotive industry designed by Renesas and introduced...")
 
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{{renesas title|R-Car M1S}}
 
{{renesas title|R-Car M1S}}
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{{mpu}}
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{{mpu
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|name=R-Car M1S
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|no image=Yes
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|designer=Renesas
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|designer 2=ARM Holdings
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|manufacturer=TSMC
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|model number=M1S
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|part number=R8A77780
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|market=Embedded
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|first announced=February 16, 2011
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|first launched=June, 2012
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|release price=$70
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|family=R-Car
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|series=1st Gen
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|frequency=800 MHz
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|isa=ARMv7
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|isa family=ARM
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|isa 2=SuperH
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|isa 2 family=SuperH
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|microarch=SH-4A
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|core name=SH-4A
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|process=40 nm
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|technology=CMOS
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|word size=32 bit
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|core count=1
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|thread count=1
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|max memory=1 GiB
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|v core=1.2 V
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|v io=3.3 V
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|package module 1={{packages/renesas/fcbga-472}}
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}}
 
'''R-Car M1S''' is a mid-range performance embedded [[single-core]] SoC for the automotive industry designed by [[Renesas]] and introduced in 2011. The M1S features a single {{renesas|SH-4A|l=arch}} core operating at 800 MHz. This SoC supports up to 1 GiB of DDR3-1066 memory.
 
'''R-Car M1S''' is a mid-range performance embedded [[single-core]] SoC for the automotive industry designed by [[Renesas]] and introduced in 2011. The M1S features a single {{renesas|SH-4A|l=arch}} core operating at 800 MHz. This SoC supports up to 1 GiB of DDR3-1066 memory.

Revision as of 10:58, 21 July 2017

Template:mpu R-Car M1S is a mid-range performance embedded single-core SoC for the automotive industry designed by Renesas and introduced in 2011. The M1S features a single SH-4A core operating at 800 MHz. This SoC supports up to 1 GiB of DDR3-1066 memory.

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