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Difference between revisions of "z-architecture"
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== Overview == | == Overview == | ||
| − | The z/Architecture was introduced in 2000 with the introduction of the {{ibm|zSeries 900}. The ISA was designed as an extension to the {{ibm|ESA/390}} and features 64-bit registers, 64-bit operations, and a 64-bit virtual and real address space. Development for z/Architecture in 1996 when IBM determined the ESA/390 had to be extended to 64-bit to overcome its limitations. The new architecture increased the 31-bit address to 64 bit, enough to address 16 [[exbibytes]]. | + | The z/Architecture was introduced in 2000 with the introduction of the {{ibm|zSeries 900}}. The ISA was designed as an extension to the {{ibm|ESA/390}} and features 64-bit registers, 64-bit operations, and a 64-bit virtual and real address space. Development for z/Architecture in 1996 when IBM determined the ESA/390 had to be extended to 64-bit to overcome its limitations. The new architecture increased the 31-bit address to 64 bit, enough to address 16 [[exbibytes]]. |
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Revision as of 15:21, 19 July 2017
z/Architecture is a 64-bit big-endian instruction set architecture introduced by IBM in October 2000 as an extension and successor to the IBM ESA/390.
Overview
The z/Architecture was introduced in 2000 with the introduction of the zSeries 900. The ISA was designed as an extension to the ESA/390 and features 64-bit registers, 64-bit operations, and a 64-bit virtual and real address space. Development for z/Architecture in 1996 when IBM determined the ESA/390 had to be extended to 64-bit to overcome its limitations. The new architecture increased the 31-bit address to 64 bit, enough to address 16 exbibytes.
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