Semiconductor & Computer Engineering
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Difference between revisions of "intel/celeron/3955u"
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|l3 break=2x1 MiB | |l3 break=2x1 MiB | ||
|l3 policy=write-back | |l3 policy=write-back | ||
| + | }} | ||
| + | |||
| + | == Memory controller == | ||
| + | {{memory controller | ||
| + | |type=DDR4-2133 | ||
| + | |type 2=LPDDR3-1866 | ||
| + | |type 3=DDR3L-1600 | ||
| + | |ecc=No | ||
| + | |max mem=32 GiB | ||
| + | |controllers=1 | ||
| + | |channels=2 | ||
| + | |max bandwidth=31.79 GiB/s | ||
| + | |bandwidth schan=15.89 GiB/s | ||
| + | |bandwidth dchan=31.79 GiB/s | ||
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Revision as of 19:04, 3 July 2017
Template:mpu Celeron 3955U is a 64-bit dual-core budget x86 mobile microprocessor introduced by Intel in late 2015. Fabricated on a 14 nm process based on the Skylake microarchitecture, this processor operates at 2 GHz. The 3955U has a TDP of 15 W with a configurable-down TDP of 10 W. This chip incorporates the HD Graphics 510 GPU operating at 300 MHz with a burst frequency of 900 MHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory.
Cache
- Main article: Skylake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Graphics
| Integrated Graphic Information | |
| GPU | Intel HD Graphics 510 |
| Displays | 3 |
| Frequency | 300 MHz 0.3 GHz
300,000 KHz |
| Max frequency | 900 MHz 0.9 GHz
900,000 KHz |
| Max memory | 1700 MiB 1,740,800 KiB
1,782,579,200 B 1.66 GiB |
| Output | DisplayPort, Embedded DisplayPort, HDMI, DVI |
| DirectX | 12 |
| OpenGL | 4.4 |
| Max HDMI Res | 4096x2304 @24 Hz |
| Max DP Res | 4096x2304 @60 Hz |
| Max eDP Res | 4096x2304 @60 Hz |
Expansions
Features
Facts about "Celeron 3955U - Intel"
| has ecc memory support | false + |
| has feature | integrated gpu + |
| integrated gpu | Intel HD Graphics 510 + |
| integrated gpu base frequency | 300 MHz (0.3 GHz, 300,000 KHz) + |
| integrated gpu max frequency | 900 MHz (0.9 GHz, 900,000 KHz) + |
| integrated gpu max memory | 1,700 MiB (1,740,800 KiB, 1,782,579,200 B, 1.66 GiB) + |
| l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
| l3$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
| max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
| max memory channels | 2 + |
| supported memory type | DDR4-2133 +, LPDDR3-1866 + and DDR3L-1600 + |