Semiconductor & Computer Engineering
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Difference between revisions of "amd/k6/amd-k6/233bcz"
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Revision as of 14:45, 13 December 2017
Template:mpu AMD-K6/233BCZ was a 32-bit x86 mobile microprocessor designed by AMD and introduced in early 1998. This chip, which was based on AMD's new K6 microarchitecture, operated at 233 MHz and dissipated a maximum of 9 W.
Contents
Cache
- Main article: K6 § Cache
L2$ can be 256 KiB to 1 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.
| Cache Info [Edit Values] | ||
| L1I$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
| L1D$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
Graphics
This SoC has no integrated graphics processing unit.
Features
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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- Auto-power down state
- Stop clock state
Documents
DataSheet
- Mobile AMD-K6 Processor Data Sheet; Publication #21049 Revision H/0; September 1999
Facts about "AMD-K6/233BCZ - AMD"
| l1d$ description | 2-way set associative + |
| l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
| l1i$ description | 2-way set associative + |
| l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |