Semiconductor & Computer Engineering
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Difference between revisions of "amd/am486/am486dx2-100v16b"
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| model number = Am486DX2-100V16B | | model number = Am486DX2-100V16B | ||
| part number = A80486DX2-100V16B | | part number = A80486DX2-100V16B | ||
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| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
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| market = Desktop | | market = Desktop | ||
| first announced = | | first announced = | ||
Revision as of 17:09, 30 June 2017
Template:mpu Am486DX2-100V16B was an 80486-compatible microprocessor introduced by AMD in 1995. This processor had a clock multiplier of 2 having base frequency of 100 MHz with a bus frequency of 50 MHz. This model had a write-back cache and double the size of L1 of previous models (16 KB). The Am486DX2-100V8T and Am486DX2-100V8B are an 8 KB version of this model.
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 16 KiB 16,384 B 0.0156 MiB |
1x16 KiB 4-way set associative (unified, write-back policy) |
Graphics
This chip had no integrated graphics processing unit.
See also
Facts about "Am486DX2-100V16B - AMD"
| l1$ description | 4-way set associative + |
| l1$ size | 16 KiB (16,384 B, 0.0156 MiB) + |