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Difference between revisions of "intel/celeron/j3160"
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Revision as of 21:16, 23 June 2017

Template:mpu The Celeron J3160 is a 64-bit quad-core system on a chip designed by Intel and introduced in early 2016. The J3160 is manufactured in 14 nm process based on the Airmont microarchitecture. This chip operates at 1.6 GHz with turbo mode of up to 2.24 GHz. This SoC incorporates the HD Graphics 400 GPU which has 12 execution units and operates at 320 MHz with up to 700 MHz bursts.

Cache

Main article: Airmont's Cache
Cache Info [Edit Values]
L1I$ 128 KiB
131,072 B
0.125 MiB
4x32 KiB 8-way set associative (per core)
L1D$ 96 KiB
98,304 B
0.0938 MiB
4x24 KiB 6-way set associative (per core)
L2$ 2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
2x1 MiB 16-way set associative (per 2 cores)
L3$ 0 KiB
0 MiB
0 B
0 GiB
No L3$

Memory controller

Integrated Memory Controller
Type DDR3L-1600
Controllers 1
Channels 2
ECC Support No
Bandwidth (single) 12,800 MB/s
Bandwidth (dual) 25,600 MB/s
Max memory 8,192 MB

Graphics

Integrated Graphic Information
GPU HD Graphics 400
Execution Units 12
Displays 3
Frequency 320 MHz
0.32 GHz
320,000 KHz
Max frequency 700 MHz
0.7 GHz
700,000 KHz
Max memory 8 GiB
8,192 MiB
8,388,608 KiB
8,589,934,592 B
Output DisplayPort, Embedded DisplayPort, HDMI
DirectX 11.1
OpenGL 4.2
OpenCL 1.2
DVI 1.4b
HDMI 1.4b
DVI 1.4b
DP 1.1a
eDP 1.4
Max HDMI Res 3840x2160 @30 Hz, 2560x1600 @60 Hz
Max DVI Res 3840x2160 @30 Hz, 2560x1600 @60 Hz
Max DP Res 3840x2160 @30 Hz, 2560x1600 @60 Hz
Max eDP Res 2560x1440 @60 Hz
  • Video decode hardware acceleration including support for H.263, MPEG4, H.264, H.265 (HEVC), VP8, VP9, MVC, MPEG2, VC1, JPEG.
  • Video encode hardware acceleration including support for H.264, H.263, VP8, MVC, JPEG.

Expansions

Template:mpu expansions

  • USB:
    • USB 3.0: 4 Super Speed (SS) Ports @ 5 Gb/s
    • USB 2.0: 1 High Speed (HS) + 4 Multiplexed with SS Ports @ 5 Gb/s
    • USB HSIC: 2 High Speed Ports @ 480 Mb/s

Features

Template:mpu features

Storage

  • SD Card Interface: v3.0
  • SDIO Interface: v3.0
  • eMMC Interface: v4.5.1
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/celeron/j3160&oldid=47358"
Facts about "Celeron J3160 - Intel"
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Celeron J3160 - Intel#io +
base frequency1,600 MHz (1.6 GHz, 1,600,000 kHz) +
bus typeIDI +
core count4 +
core nameBraswell +
core steppingD1 +
cpuid406C4 +
designerIntel +
familyCeleron +
first announcedJanuary 15, 2016 +
first launchedJanuary 15, 2016 +
full page nameintel/celeron/j3160 +
has featureintegrated gpu +, Advanced Encryption Standard Instruction Set Extension + and Enhanced SpeedStep Technology +
has intel enhanced speedstep technologytrue +
has locked clock multipliertrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
integrated gpuHD Graphics 400 +
integrated gpu base frequency320 MHz (0.32 GHz, 320,000 KHz) +
integrated gpu max frequency700 MHz (0.7 GHz, 700,000 KHz) +
integrated gpu max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB) +
l1d$ description6-way set associative +
l1d$ size96 KiB (98,304 B, 0.0938 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description16-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ descriptionNo L3$ +
l3$ size0 MiB (0 KiB, 0 B, 0 GiB) +
ldateJanuary 15, 2016 +
manufacturerIntel +
market segmentDesktop +
max cpu count1 +
max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max operating temperature90 °C +
max pcie lanes4 +
microarchitectureAirmont +
min operating temperature0 °C +
model numberJ3160 +
nameIntel Celeron J3160 +
part numberFH8066501715935 +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 107.00 (€ 96.30, £ 86.67, ¥ 11,056.31) +
s-specSR2KS +
s-spec (qs)QK0N +
seriesJ3000 +
smp max ways1 +
tdp6 W (6,000 mW, 0.00805 hp, 0.006 kW) +
technologyCMOS +
thread count4 +
turbo frequency (1 core)2,240 MHz (2.24 GHz, 2,240,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +