Semiconductor & Computer Engineering
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Difference between revisions of "amd/am486/am486dx4-100v8t"
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Revision as of 20:41, 23 June 2017
Template:mpu Am486DX2-100V8T was an 80486-compatible microprocessor introduced by AMD in 1994. This processor had a clock multiplier of 3 having base frequency of 100 MHz with a bus frequency of 33 MHz. This model was simply renamed from Am486DX4-100 to differentiate it from the Am486DX4-100V16B which is a similar model with a Write-Back cache policy and double the cache size.
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics
This chip had no integrated graphics processing unit.
See also
Facts about "Am486DX4-100V8T - AMD"
| l1$ description | 4-way set associative + |
| l1$ size | 8 KiB (8,192 B, 0.00781 MiB) + |