-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Difference between revisions of "Form:microarchitecture"
Line 145: | Line 145: | ||
L1D Desc:{{{field|l1d desc|input type=text|placeholder=e.g. 8-way set associative}}} | L1D Desc:{{{field|l1d desc|input type=text|placeholder=e.g. 8-way set associative}}} | ||
</td><td>L1D cache info</td></tr> | </td><td>L1D cache info</td></tr> | ||
+ | <tr><th>L1$ (Unified)</th><td> | ||
+ | L1: {{{field|l1|input type=text|placeholder=e.g. 32 KiB}}}<br> | ||
+ | L1 Per:{{{field|l1 per|input type=text|placeholder=e.g. core}}}<br> | ||
+ | L1 Desc:{{{field|l1 desc|input type=text|placeholder=e.g. 8-way set associative}}} | ||
+ | </td><td>Unified L1 cache info</td></tr> | ||
<tr><th>L2$</th><td> | <tr><th>L2$</th><td> | ||
L2: {{{field|l2|input type=text|placeholder=e.g. 32 KiB}}}<br> | L2: {{{field|l2|input type=text|placeholder=e.g. 32 KiB}}}<br> |
Revision as of 17:23, 28 June 2017
This is the "Microarchitecture" form. To create a page with this form, enter the page name below; if a page with that name already exists, you will be sent to a form to edit that page.