From WikiChip
Difference between revisions of "intel/core i5/i5-7300hq"
(Created page with "{{intel title|Core i5-7300HQ}}") |
|||
Line 1: | Line 1: | ||
{{intel title|Core i5-7300HQ}} | {{intel title|Core i5-7300HQ}} | ||
+ | {{mpu | ||
+ | | name = Core i5-7300HQ | ||
+ | | no image = Yes | ||
+ | | image = | ||
+ | | image size = | ||
+ | | caption = | ||
+ | | designer = Intel | ||
+ | | manufacturer = Intel | ||
+ | | model number = i5-7300HQ | ||
+ | | part number = | ||
+ | | part number 1 = | ||
+ | | part number 2 = | ||
+ | | s-spec = | ||
+ | | market = Mobile | ||
+ | | first announced = January 3, 2017 | ||
+ | | first launched = January 3, 2017 | ||
+ | | last order = | ||
+ | | last shipment = | ||
+ | | release price = | ||
+ | |||
+ | | family = Core i5 | ||
+ | | series = i5-7300 | ||
+ | | locked = Yes | ||
+ | | frequency = 2,500 MHz | ||
+ | | turbo frequency = Yes | ||
+ | | turbo frequency1 = 3,500 MHz | ||
+ | | turbo frequency2 = | ||
+ | | turbo frequency3 = | ||
+ | | turbo frequency4 = | ||
+ | | bus type = DMI 3.0 | ||
+ | | bus speed = | ||
+ | | bus rate = 8 GT/s | ||
+ | | bus links = | ||
+ | | clock multiplier = 25 | ||
+ | | cpuid = | ||
+ | |||
+ | | isa family = x86 | ||
+ | | isa = x86-64 | ||
+ | | microarch = Kaby Lake | ||
+ | | platform = Kaby Lake | ||
+ | | chipset = Sunrise Point | ||
+ | | chipset 2 = Union Point | ||
+ | | core name = Kaby Lake S | ||
+ | | core family = 6 | ||
+ | | core model = 158 | ||
+ | | core stepping = | ||
+ | | core stepping 2 = | ||
+ | | process = 14 nm | ||
+ | | transistors = | ||
+ | | technology = CMOS | ||
+ | | die area = | ||
+ | | die width = | ||
+ | | die length = | ||
+ | | word size = 64 bit | ||
+ | | core count = 4 | ||
+ | | thread count = 4 | ||
+ | | max cpus = 1 | ||
+ | | max memory = 64 GiB | ||
+ | |||
+ | | electrical = Yes | ||
+ | | v core min = 0.55 V | ||
+ | | v core max = 1.52 V | ||
+ | | sdp = | ||
+ | | tdp = 45 W | ||
+ | | tdp typical = | ||
+ | | ctdp down = 35 W | ||
+ | | ctdp down frequency = | ||
+ | | ctdp up = | ||
+ | | ctdp up frequency = | ||
+ | | tjunc min = 0 °C | ||
+ | | tjunc max = 100 °C | ||
+ | | tcase min = | ||
+ | | tcase max = | ||
+ | | tstorage min = -25 °C | ||
+ | | tstorage max = 125 °C | ||
+ | | tambient min = | ||
+ | | tambient max = | ||
+ | |||
+ | | packaging = Yes | ||
+ | | package = FCBGA-1440 | ||
+ | | package type = FCBGA | ||
+ | | package pitch = | ||
+ | | package size = | ||
+ | | socket = BGA-1440 | ||
+ | | socket type = BGA | ||
+ | }} |