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Difference between revisions of "cavium/octeon/cn3630-400bg1521-nsp"
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The '''CN3630-400 NSP''' is a {{arch|64}} [[quad-core]] [[MIPS]] network service [[microprocessor]] (NSP) designed by [[Cavium]] and introduced in [[2005]]. This processor, which incorporates four {{cavium|cnMIPS|l=arch}} cores, operates at 400 MHz and dissipates 14 Watts. This processor includes a number of hardware networking accelerators including units for high-performance packet I/O processing, QoS, TCP, encryption, and RegEx. This MPU supports up to 16 GiB of DDR2-800 ECC memory.

Revision as of 05:57, 10 December 2016

Template:mpu The CN3630-400 NSP is a 64-bit quad-core MIPS network service microprocessor (NSP) designed by Cavium and introduced in 2005. This processor, which incorporates four cnMIPS cores, operates at 400 MHz and dissipates 14 Watts. This processor includes a number of hardware networking accelerators including units for high-performance packet I/O processing, QoS, TCP, encryption, and RegEx. This MPU supports up to 16 GiB of DDR2-800 ECC memory.

Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
CN3630-400 NSP - Cavium#package +
base frequency400 MHz (0.4 GHz, 400,000 kHz) +
core count4 +
core namecnMIPS +
designerCavium +
familyOCTEON +
first announcedAugust 2005 +
first launchedAugust 2005 +
full page namecavium/octeon/cn3630-400bg1521-nsp +
has ecc memory supporttrue +
has hardware accelerators for cryptographytrue +
has hardware accelerators for data compressiontrue +
has hardware accelerators for data decompressiontrue +
has hardware accelerators for network quality of service processingtrue +
has hardware accelerators for regular expressiontrue +
has hardware accelerators for tcp packet processingtrue +
instance ofmicroprocessor +
isaMIPS64 +
isa familyMIPS +
l1$ size160 KiB (163,840 B, 0.156 MiB) +
l1d$ description64-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description64-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
ldateAugust 2005 +
main imageFile:octeon cn38xx.png +
manufacturerTSMC +
market segmentNetworking +
max cpu count1 +
max memory16,384 MiB (16,777,216 KiB, 17,179,869,184 B, 16 GiB, 0.0156 TiB) +
max memory bandwidth5.96 GiB/s (6,103.04 MiB/s, 6.4 GB/s, 6,399.501 MB/s, 0.00582 TiB/s, 0.0064 TB/s) +
max memory channels1 +
microarchitecturecnMIPS +
model numberCN3630-400 NSP +
nameCavium CN3630-400 NSP +
packageFCBGA-1521 +
part numberCN3630-400BG1521-NSP +
power dissipation14 W (14,000 mW, 0.0188 hp, 0.014 kW) +
process130 nm (0.13 μm, 1.3e-4 mm) +
seriesCN3600 +
smp max ways1 +
supported memory typeDDR2-800 +
technologyCMOS +
thread count4 +
word size64 bit (8 octets, 16 nibbles) +