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Difference between revisions of "intel/celeron/p4600"
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|l3 desc=8-way set associative
 
|l3 desc=8-way set associative
 
|l3 policy=write-back
 
|l3 policy=write-back
 +
}}
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== Memory controller ==
 +
{{memory controller
 +
|type=DDR3-1066
 +
|ecc=No
 +
|max mem=8 GiB
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|controllers=1
 +
|channels=2
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|max bandwidth=15.88 GiB/s
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|bandwidth schan=7.942 GiB/s
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|bandwidth dchan=15.88 GiB/s
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|pae=36 bit
 
}}
 
}}

Revision as of 01:42, 1 December 2016

Template:mpu Celeron P4600 is a 64-bit dual-core x86 mobile microprocessor introduced by Intel in 2010. This processor operates at a frequency of 2.00 GHz and a TDP of 35 W. This MPU is manufactured on a 32 nm process based on the Westmere microarchitecture (Arrandale core). This processor incorporated the HD Graphics (Ironlake) IGP on the same package operating at a base frequency of 500.00 MHz and a burst frequency of 667.00 MHz.

Cache

Main article: Westmere § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB4-way set associativewrite-back
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB8-way set associativewrite-back
L3$2 MiB
2,048 KiB
2,097,152 B
0.00195 GiB
  2x1 MiB8-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-1066
Supports ECCNo
Max Mem8 GiB
Controllers1
Channels2
Max Bandwidth15.88 GiB/s
16,261.12 MiB/s
17.051 GB/s
17,051.02 MB/s
0.0155 TiB/s
0.0171 TB/s
Bandwidth
Single 7.942 GiB/s
Double 15.88 GiB/s
Physical Address (PAE)36 bit
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/celeron/p4600&oldid=29919"
Facts about "Celeron P4600 - Intel"
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Celeron P4600 - Intel#package + and Celeron P4600 - Intel#io +
base frequency1,999.99 MHz (2 GHz, 1,999,990 kHz) +
bus links1 +
bus rate2,500 MT/s (2.5 GT/s, 2,500,000 kT/s) +
bus typeDMI 1.0 +
chipsetIbex Peak +
clock multiplier15 +
core count2 +
core family6 +
core model37 +
core nameArrandale +
core steppingK0 +
cpuid0x20655 +
designerIntel +
device id0x0046 +
die area81 mm² (0.126 in², 0.81 cm², 81,000,000 µm²) +
familyCeleron +
first announcedMarch 28, 2010 +
first launchedMarch 28, 2010 +
full page nameintel/celeron/p4600 +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureFlex Memory Access +, Enhanced SpeedStep Technology + and Extended Page Tables +
has intel enhanced speedstep technologytrue +
has intel flex memory access supporttrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
instance ofmicroprocessor +
integrated gpuHD Graphics (Ironlake) +
integrated gpu base frequency500 MHz (0.5 GHz, 500,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units12 +
integrated gpu max frequency667 MHz (0.667 GHz, 667,000 KHz) +
isax86-64 +
isa familyx86 +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description4-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ description8-way set associative +
l3$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
ldateMarch 28, 2010 +
manufacturerIntel +
market segmentMobile +
max cpu count1 +
max junction temperature363.15 K (90 °C, 194 °F, 653.67 °R) +
max memory8,192 MiB (8,388,608 KiB, 8,589,934,592 B, 8 GiB, 0.00781 TiB) +
max memory bandwidth15.88 GiB/s (16,261.12 MiB/s, 17.051 GB/s, 17,051.02 MB/s, 0.0155 TiB/s, 0.0171 TB/s) +
max memory channels2 +
max pcie lanes16 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureWestmere +
min junction temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberP4600 +
nameIntel Celeron P4600 +
packagerPGA-988A +
part numberCP80617005307AB +
platformCalpella +
process32 nm (0.032 μm, 3.2e-5 mm) +
s-specSLBZY +
seriesP4000 +
smp max ways1 +
supported memory typeDDR3-1066 +
tdp35 W (35,000 mW, 0.0469 hp, 0.035 kW) +
technologyCMOS +
thread count2 +
transistor count382,000,000 +
word size64 bit (8 octets, 16 nibbles) +