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Difference between revisions of "qualcomm/msm6xxx/msm6050"
< qualcomm‎ | msm6xxx

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'''MSM6050''' is a {{arch|32}} [[ARM]] [[system-on-chip]] with [[3G]] wireless capabilities developed by [[Qualcomm]] and introduced in [[2003]] for the mobile market. This SoC was part of the {{qualcomm|MSM6xxx}} [[part of::Value Platform]] offering support for features such as basic color screens, position-location services, music, ringtones and voice recognition features.
 
'''MSM6050''' is a {{arch|32}} [[ARM]] [[system-on-chip]] with [[3G]] wireless capabilities developed by [[Qualcomm]] and introduced in [[2003]] for the mobile market. This SoC was part of the {{qualcomm|MSM6xxx}} [[part of::Value Platform]] offering support for features such as basic color screens, position-location services, music, ringtones and voice recognition features.
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== Cache ==
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{{main|arm holdings/microarchitectures/ARM7#Memory_Hierarchy|l1=ARM7 § Cache}}
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{{cache info
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|l1i cache=0 KiB
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|l1i break=1x0 KiB
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|l1i desc=
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|l1i extra=
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}}

Revision as of 22:53, 20 November 2016

Template:mpu MSM6050 is a 32-bit ARM system-on-chip with 3G wireless capabilities developed by Qualcomm and introduced in 2003 for the mobile market. This SoC was part of the MSM6xxx Value Platform offering support for features such as basic color screens, position-location services, music, ringtones and voice recognition features.

Cache

Main article: ARM7 § Cache
Cache Info [Edit Values]
L1I$ 0 KiB
0 B
0 MiB
1x0 KiB
Facts about "MSM6050 - Qualcomm"
base frequency40 MHz (0.04 GHz, 40,000 kHz) +
bus typeAMBA 2 +
chipsetMSM6xxx +
core count1 +
core nameARM7TDMI +
designerQualcomm + and ARM Holdings +
dspQDSP4000 +
dsp base frequency40 MHz (0.04 GHz, 40,000 kHz) +
familyMSM6xxx +
first announcedMarch 20, 2001 +
first launchedJanuary 2003 +
full page namequalcomm/msm6xxx/msm6050 +
has 2g supporttrue +
has 3g supporttrue +
has cdma2000 1x supporttrue +
has cdma2000 supporttrue +
has cdmaone supporttrue +
has is-95a supporttrue +
has is-95b supporttrue +
has locked clock multipliertrue +
instance ofmicroprocessor +
l1i$ descriptionNo L1$ +
l1i$ size0 KiB (0 B, 0 MiB) +
ldateJanuary 2003 +
main imageFile:msm6050 thumb.jpg +
manufacturerTSMC + and IBM +
market segmentMobile + and Embedded +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max memory address0xFFFFFFFF +
microarchitectureARM7 +
model numberMSM6050 +
nameQualcomm MSM6050 +
part ofValue Platform +
process180 nm (0.18 μm, 1.8e-4 mm) +
seriesMSM +
smp max ways1 +
technologyCMOS +
thread count1 +