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Difference between revisions of "intel/xeon e3/e3-1205 v6"
< intel
Line 53: | Line 53: | ||
| max memory = | | max memory = | ||
− | | electrical = | + | | electrical = |
| v core = | | v core = | ||
| v core tolerance = | | v core tolerance = | ||
| sdp = | | sdp = | ||
− | | tdp = | + | | tdp = |
| ctdp down = | | ctdp down = | ||
| ctdp down frequency = | | ctdp down frequency = |
Revision as of 23:14, 5 November 2016
Template:mpu The Xeon E3-1205 v6 is an entry-level workstations and servers 64-bit x86 quad-core microprocessor designed by Intel and set to be released in late 2016 or early 2017. This Kaby Lake-based chip operates at 3 GHz.