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Difference between revisions of "intel/xeon e5/e5-2650l v4"
< intel‎ | xeon e5

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| max memory        = 1,536 GiB
 
| max memory        = 1,536 GiB
 
| pae                = 46 bit
 
| pae                = 46 bit
 +
}}
 +
 +
== Features ==
 +
{{mpu features
 +
| em64t      = Yes
 +
| nx          = Yes
 +
| txt        = Yes
 +
| tsx        = Yes
 +
| vpro        = Yes
 +
| ht          = Yes
 +
| tbt1        =
 +
| tbt2        = Yes
 +
| tbmt3      =
 +
| bpt        =
 +
| vt-x        = Yes
 +
| vt-d        = Yes
 +
| ept        = Yes
 +
| mmx        = Yes
 +
| sse        = Yes
 +
| sse2        = Yes
 +
| sse3        = Yes
 +
| ssse3      = Yes
 +
| sse4.1      = Yes
 +
| sse4.2      = Yes
 +
| aes        = Yes
 +
| pclmul      = Yes
 +
| avx        = Yes
 +
| avx2        = Yes
 +
| bmi        = Yes
 +
| bmi1        = Yes
 +
| bmi2        = Yes
 +
| f16c        = Yes
 +
| fma3        = Yes
 +
| mpx        =
 +
| sgx        =
 +
| eist        = Yes
 +
| secure key  = Yes
 +
| os guard    = Yes
 +
| intel at    =
 +
| intel ipt  =
 
}}
 
}}

Revision as of 19:24, 3 November 2016

Template:mpu The Xeon E5-2650L v4 is a 64-bit tetradeca-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for low-power 2S environments. Operating at 1.7 GHz with a turbo boost frequency of 2.5 GHz for a single active core, this MPU has a TDP of 65 W and is manufactured on a 14 nm process (based on Broadwell).

Cache

Main article: Broadwell § Cache
Cache Info [Edit Values]
L1I$ 448 KiB
458,752 B
0.438 MiB
14x32 KiB 8-way set associative (per core, write-back)
L1D$ 448 KiB
458,752 B
0.438 MiB
14x32 KiB 8-way set associative (per core, write-back)
L2$ 3.5 MiB
3,584 KiB
3,670,016 B
0.00342 GiB
14x256 KiB 8-way set associative (per core, write-back)
L3$ 35 MiB
35,840 KiB
36,700,160 B
0.0342 GiB
14x2.5 MiB 20-way set associative (shared, per core, write-back)

Graphics

This microprocessor has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type DDR4-2400
Controllers 1
Channels 4
ECC Support Yes
Max bandwidth 71.53 GiB/s
Bandwidth (single) 17.88 GiB/s
Bandwidth (dual) 35.76 GiB/s
Max memory 1,536 GiB
Physical Address Extensions 46 bit

Features

Template:mpu features

Retrieved from "https://en.wikichip.org/w/index.php?title=intel/xeon_e5/e5-2650l_v4&oldid=26668"
Facts about "Xeon E5-2650L v4 - Intel"
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Xeon E5-2650L v4 - Intel#io +
base frequency1,700 MHz (1.7 GHz, 1,700,000 kHz) +
bus links2 +
bus rate9,600 MT/s (9.6 GT/s, 9,600,000 kT/s) +
bus speed4,800 MHz (4.8 GHz, 4,800,000 kHz) +
bus typeQPI +
chipsetC610 Series +
clock multiplier17 +
core count14 +
core family6 +
core model4F +
core nameBroadwell EP +
core steppingM0 +
core voltage1.82 V (18.2 dV, 182 cV, 1,820 mV) +
cpuid406F1 +
designerIntel +
die area306.18 mm² (0.475 in², 3.062 cm², 306,180,000 µm²) +
familyXeon E5 +
first announcedJune 20, 2016 +
first launchedJune 20, 2016 +
full page nameintel/xeon e5/e5-2650l v4 +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has extended page tables supporttrue +
has featureTrusted Execution Technology +, Transactional Synchronization Extensions +, Intel vPro Technology +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology + and Extended Page Tables +
has intel enhanced speedstep technologytrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
io voltage1.2 V (12 dV, 120 cV, 1,200 mV) +
io voltage tolerance3% +
l1d$ description8-way set associative +
l1d$ size448 KiB (458,752 B, 0.438 MiB) +
l1i$ description8-way set associative +
l1i$ size448 KiB (458,752 B, 0.438 MiB) +
l2$ description8-way set associative +
l2$ size3.5 MiB (3,584 KiB, 3,670,016 B, 0.00342 GiB) +
l3$ description20-way set associative +
l3$ size35 MiB (35,840 KiB, 36,700,160 B, 0.0342 GiB) +
ldateJune 20, 2016 +
manufacturerIntel +
market segmentServer +
max case temperature337.15 K (64 °C, 147.2 °F, 606.87 °R) +
max cpu count2 +
max memory1,572,864 MiB (1,610,612,736 KiB, 1,649,267,441,664 B, 1,536 GiB, 1.5 TiB) +
max pcie lanes40 +
max storage temperature398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitectureBroadwell +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature248.15 K (-25 °C, -13 °F, 446.67 °R) +
model numberE5-2650L v4 +
nameXeon E5-2650L v4 +
part numberCM8066002033006 +
platformGrantley EP 2S +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 1,329.00 (€ 1,196.10, £ 1,076.49, ¥ 137,325.57) +
s-specSR2N8 +
s-spec (qs)QK93 +
seriesE5-2000 +
smp max ways2 +
tdp65 W (65,000 mW, 0.0872 hp, 0.065 kW) +
technologyCMOS +
thread count28 +
transistor count4,700,000,000 +
turbo frequency (10 cores)2,000 MHz (2 GHz, 2,000,000 kHz) +
turbo frequency (11 cores)2,000 MHz (2 GHz, 2,000,000 kHz) +
turbo frequency (12 cores)2,000 MHz (2 GHz, 2,000,000 kHz) +
turbo frequency (13 cores)2,000 MHz (2 GHz, 2,000,000 kHz) +
turbo frequency (14 cores)2,000 MHz (2 GHz, 2,000,000 kHz) +
turbo frequency (1 core)2,500 MHz (2.5 GHz, 2,500,000 kHz) +
turbo frequency (2 cores)2,500 MHz (2.5 GHz, 2,500,000 kHz) +
turbo frequency (3 cores)2,300 MHz (2.3 GHz, 2,300,000 kHz) +
turbo frequency (4 cores)2,200 MHz (2.2 GHz, 2,200,000 kHz) +
turbo frequency (5 cores)2,100 MHz (2.1 GHz, 2,100,000 kHz) +
turbo frequency (6 cores)2,000 MHz (2 GHz, 2,000,000 kHz) +
turbo frequency (7 cores)2,000 MHz (2 GHz, 2,000,000 kHz) +
turbo frequency (8 cores)2,000 MHz (2 GHz, 2,000,000 kHz) +
turbo frequency (9 cores)2,000 MHz (2 GHz, 2,000,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +