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Difference between revisions of "intel/xeon e5/e5-4650 v4"
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== Graphics ==
 
== Graphics ==
 
This microprocessor has no [[integrated graphics processing unit]].
 
This microprocessor has no [[integrated graphics processing unit]].
 +
 +
== Memory controller ==
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{{integrated memory controller
 +
| type              = DDR4-2133
 +
| controllers        = 1
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| channels          = 4
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| ecc support        = Yes
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| max bandwidth      = 68.2 GiB/s
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| bandwidth schan    =
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| bandwidth dchan    = 34.1 GiB/s
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| max memory        = 1,536 GiB
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| pae                = 46 bit
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}}

Revision as of 13:37, 3 November 2016

Template:mpu The Xeon E5-4650 v4 is a 64-bit tetradeca-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for advanced 4S environments. Operating at 2.2 GHz with a turbo boost frequency of 2.8 GHz for a single active core, this MPU has a TDP of 105 W and is manufactured on a 14 nm process (based on Broadwell).

Cache

Main article: Broadwell § Cache
Cache Info [Edit Values]
L1I$ 448 KiB
458,752 B
0.438 MiB
14x32 KiB 8-way set associative (per core, write-back)
L1D$ 448 KiB
458,752 B
0.438 MiB
14x32 KiB 8-way set associative (per core, write-back)
L2$ 3.5 MiB
3,584 KiB
3,670,016 B
0.00342 GiB
14x256 KiB 8-way set associative (per core, write-back)
L3$ 35 MiB
35,840 KiB
36,700,160 B
0.0342 GiB
14x2.5 MiB 20-way set associative (shared, per core, write-back)

Graphics

This microprocessor has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type DDR4-2133
Controllers 1
Channels 4
ECC Support Yes
Max bandwidth 68.2 GiB/s
Bandwidth (dual) 34.1 GiB/s
Max memory 1,536 GiB
Physical Address Extensions 46 bit
l1d$ description8-way set associative +
l1d$ size448 KiB (458,752 B, 0.438 MiB) +
l1i$ description8-way set associative +
l1i$ size448 KiB (458,752 B, 0.438 MiB) +
l2$ description8-way set associative +
l2$ size3.5 MiB (3,584 KiB, 3,670,016 B, 0.00342 GiB) +
l3$ description20-way set associative +
l3$ size35 MiB (35,840 KiB, 36,700,160 B, 0.0342 GiB) +